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Message-ID: <10620511.nUPlyArG6x@jernej-laptop>
Date: Sun, 09 Mar 2025 07:57:47 +0100
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: Michael Turquette <mturquette@...libre.com>,
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Chen-Yu Tsai <wens@...e.org>, Samuel Holland <samuel@...lland.org>,
 Andre Przywara <andre.przywara@....com>
Cc: Philipp Zabel <p.zabel@...gutronix.de>, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 12/14] clk: sunxi-ng: a523: add bus clock gates

Dne petek, 7. marec 2025 ob 01:26:26 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> Add the various bus clock gates that control access to the devices'
> register interface.
> These clocks are each just one bit, typically the lower bits in some "BGR"
> (Bus Gate / Reset) registers, for each device group: one for all UARTs,
> one for all SPI interfaces, and so on.
> 
> Signed-off-by: Andre Przywara <andre.przywara@....com>

Reviewed-by: Jernej Skrabec <jernej.skrabec@...il.com>

Best regards,
Jernej



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