linux-kernel - Re: [PATCH v1] drivers: clk: qcom: ipq5424: fix the freq table of sdcc1

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Message-ID: <bf79cf5a-0c50-49e0-b930-1ec5028e7d0c@oss.qualcomm.com>
Date: Mon, 10 Mar 2025 15:30:24 +0530
From: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@....qualcomm.com>
To: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>, andersson@...nel.org,
        mturquette@...libre.com, sboyd@...nel.org, dmitry.baryshkov@...aro.org,
        quic_srichara@...cinc.com, quic_varada@...cinc.com,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] drivers: clk: qcom: ipq5424: fix the freq table of
 sdcc1_apps clock

On 3/6/2025 4:59 PM, Manikanta Mylavarapu wrote:
> The divider values in the sdcc1_apps frequency table were incorrectly
> updated, assuming the frequency of gpll2_out_main to be 1152MHz.
> However, the frequency of the gpll2_out_main clock is actually 576MHz
> (gpll2/2).
>
> Due to these incorrect divider values, the sdcc1_apps clock is running
> at half of the expected frequency.
>
> Fixing the frequency table of sdcc1_apps allows the sdcc1_apps clock to
> run according to the frequency plan.
>
> Fixes: 21b5d5a4a311 ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5424 SoC")
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>

Reviewed-by: Kathiravan Thirumoorthy 
<kathiravan.thirumoorthy@....qualcomm.com>