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Message-ID: <174198247888.1604753.880832461804374805.b4-ty@kernel.org>
Date: Fri, 14 Mar 2025 15:01:09 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: mturquette@...libre.com,
	sboyd@...nel.org,
	dmitry.baryshkov@...aro.org,
	quic_srichara@...cinc.com,
	quic_varada@...cinc.com,
	linux-arm-msm@...r.kernel.org,
	linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
Subject: Re: [PATCH v1] drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock


On Thu, 06 Mar 2025 16:59:00 +0530, Manikanta Mylavarapu wrote:
> The divider values in the sdcc1_apps frequency table were incorrectly
> updated, assuming the frequency of gpll2_out_main to be 1152MHz.
> However, the frequency of the gpll2_out_main clock is actually 576MHz
> (gpll2/2).
> 
> Due to these incorrect divider values, the sdcc1_apps clock is running
> at half of the expected frequency.
> 
> [...]

Applied, thanks!

[1/1] drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock
      commit: e9ed0ac3ccba65c17ed0d59c77a340a75abc317b

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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