linux-kernel - Re: [PATCH v12 3/4] arm64: topology: Support SMT control on ACPI based system

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <Z9BL1DgDlcYKVaDu@bogus>
Date: Tue, 11 Mar 2025 14:42:28 +0000
From: Sudeep Holla <sudeep.holla@....com>
To: Yicong Yang <yangyicong@...wei.com>
Cc: <catalin.marinas@....com>, <will@...nel.org>, <tglx@...utronix.de>,
	<peterz@...radead.org>, <mpe@...erman.id.au>,
	<linux-arm-kernel@...ts.infradead.org>, <mingo@...hat.com>,
	<bp@...en8.de>, <dave.hansen@...ux.intel.com>,
	<pierre.gondois@....com>, <dietmar.eggemann@....com>,
	<linuxppc-dev@...ts.ozlabs.org>, <x86@...nel.org>,
	<linux-kernel@...r.kernel.org>, <morten.rasmussen@....com>,
	<msuchanek@...e.de>, <gregkh@...uxfoundation.org>,
	<rafael@...nel.org>, <jonathan.cameron@...wei.com>,
	<prime.zeng@...ilicon.com>, <linuxarm@...wei.com>,
	<yangyicong@...ilicon.com>, <xuwei5@...wei.com>,
	<guohanjun@...wei.com>, <sshegde@...ux.ibm.com>
Subject: Re: [PATCH v12 3/4] arm64: topology: Support SMT control on ACPI
 based system

On Tue, Mar 11, 2025 at 03:51:42PM +0800, Yicong Yang wrote:
> From: Yicong Yang <yangyicong@...ilicon.com>
> 
> For ACPI we'll build the topology from PPTT and we cannot directly
> get the SMT number of each core. Instead using a temporary xarray
> to record the heterogeneous information (from ACPI_PPTT_ACPI_IDENTICAL)
> and SMT information of the first core in its heterogeneous CPU cluster
> when building the topology. Then we can know the largest SMT number
> in the system. If a homogeneous system's using ACPI 6.2 or later,
> all the CPUs should be under the root node of PPTT. There'll be
> only one entry in the xarray and all the CPUs in the system will
> be assumed identical.
> 
> The framework's SMT control provides two interface to the users [1]
> through /sys/devices/system/cpu/smt/control:
> 1) enable SMT by writing "on" and disable by "off"
> 2) enable SMT by writing max_thread_number or disable by writing 1
> 
> Both method support to completely disable/enable the SMT cores so both
> work correctly for symmetric SMT platform and asymmetric platform with
> non-SMT and one type SMT cores like:
> core A: 1 thread
> core B: X (X!=1) threads
> 
> Note that for a theoretically possible multiple SMT-X (X>1) core
> platform the SMT control is also supported as expected but only
> by writing the "on/off" method.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu#n542

Ditto, just path please.

Reviewed-by: Sudeep Holla <sudeep.holla@....com>

--
Regards,
Sudeep