linux-kernel - Re: [PATCH v2 0/8] clk: qcom: Add support to attach multiple power domains in cc probe

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Message-ID: <4ab44b17-5077-4090-9e34-3e508b08f4f9@quicinc.com>
Date: Wed, 12 Mar 2025 12:43:06 +0530
From: Jagadeesh Kona <quic_jkona@...cinc.com>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
        Vladimir Zapolskiy
	<vladimir.zapolskiy@...aro.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
        Imran Shaik
	<quic_imrashai@...cinc.com>,
        Taniya Das <quic_tdas@...cinc.com>,
        "Satya Priya
 Kakitapalli" <quic_skakitap@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Dmitry Baryshkov
	<dmitry.baryshkov@...aro.org>
Subject: Re: [PATCH v2 0/8] clk: qcom: Add support to attach multiple power
 domains in cc probe



On 3/11/2025 5:40 PM, Bryan O'Donoghue wrote:
> On 11/03/2025 10:12, Vladimir Zapolskiy wrote:
>> On 3/11/25 11:52, Bryan O'Donoghue wrote:
>>> On 06/03/2025 08:55, Jagadeesh Kona wrote:
>>>> In some of the recent chipsets, PLLs require more than one power domain
>>>> to be kept ON to configure the PLL. But the current code doesn't enable
>>>> all the required power domains while configuring the PLLs, this leads
>>>> to functional issues due to suboptimal settings of PLLs.
>>>>
>>>> To address this, add support for handling runtime power management,
>>>> configuring plls and enabling critical clocks from qcom_cc_really_probe.
>>>> The clock controller can specify PLLs, critical clocks, and runtime PM
>>>> requirements in the descriptor data. The code in qcom_cc_really_probe()
>>>> ensures all necessary power domains are enabled before configuring PLLs
>>>> or critical clocks.
>>>>
>>>> This series updates SM8450 & SM8550 videocc drivers to handle rpm,
>>>> configure PLLs and enable critical clocks from within qcom_cc_really_probe()
>>>> using above support, so video PLLs are configured properly.
>>>>
>>>> This series fixes the below warning reported in SM8550 venus testing due
>>>> to video_cc_pll0 not properly getting configured during videocc probe
>>>>
>>>> [   46.535132] Lucid PLL latch failed. Output may be unstable!
>>>>
>>>> The patch adding support to configure the PLLs from common code is
>>>> picked from below series and updated it.
>>>> https://lore.kernel.org/all/20250113-support-pll-reconfigure- v1-0-1fae6bc1062d@...cinc.com/
>>>>
>>>> Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
>>>> ---
>>>> Changes in v2:
>>>>    - Added support to handle rpm, PLL configuration and enable critical
>>>>      clocks from qcom_cc_really_probe() in common code as per v1 commments
>>>>      from Bryan, Konrad and Dmitry
>>>>    - Added patches to configure PLLs from common code
>>>>    - Updated the SM8450, SM8550 videocc patches to use the newly
>>>>      added support to handle rpm, configure PLLs from common code
>>>>    - Split the DT change for each target separately as per
>>>>      Dmitry comments
>>>>    - Added R-By and A-By tags received on v1
>>>> - Link to v1: https://lore.kernel.org/r/20250218-videocc-pll-multi- pd-voting-v1-0-cfe6289ea29b@...cinc.com
>>>>
>>>> ---
>>>> Jagadeesh Kona (7):
>>>>         dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domain
>>>>         clk: qcom: common: Manage rpm, configure PLLs & AON clks in really probe
>>>>         clk: qcom: videocc-sm8450: Move PLL & clk configuration to really probe
>>>>         clk: qcom: videocc-sm8550: Move PLL & clk configuration to really probe
>>>>         arm64: dts: qcom: Add MXC power domain to videocc node on SM8450
>>>>         arm64: dts: qcom: Add MXC power domain to videocc node on SM8550
>>>>         arm64: dts: qcom: Add MXC power domain to videocc node on SM8650
>>>>
>>> This list looks sparse.
>>>
>>> - camcc is missing
>>> - x1e is missing
>>> - sm8650 and sm8750 and both also missing
>>>
>>
>> Since there are concerns about DT bindings ABI change of CAMCC given by
>> Krzysztof, likely CAMCC changes shall not be inserted into this series.
>>
>> -- 
>> Best wishes,
>> Vladimir
> 
> drivers/clk/qcom/camcc-sm8650.c
> drivers/clk/qcom/camcc-x1e80100.c
> 
> In fact we appear to be amending the dts but not the driver for the 8650 here.
> 
> @Jagadeesh please follow up.
> 

SM8650 videocc is just reusing the SM8550 videocc driver, so no separate changes
are required for SM8650. Will add support for above camcc drivers in next series.

Thanks,
Jagadeesh
 
> ---
> bod