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Message-ID: <20250312084330.873994-2-quic_varada@quicinc.com>
Date: Wed, 12 Mar 2025 14:13:27 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
<manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <andersson@...nel.org>,
<konradybcio@...nel.org>, <quic_srichara@...cinc.com>,
<quic_devipriy@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: Varadarajan Narayanan <quic_varada@...cinc.com>
Subject: [PATCH v12 1/4] dt-bindings: PCI: qcom: Add MHI registers for IPQ9574
Append the MHI register range to IPQ9574.
Fixes: e0662dae178d ("dt-bindings: PCI: qcom: Document the IPQ9574 PCIe controller")
Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
---
New patch introduced in this patchset. MHI range was missed in the
initial post
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 8f628939209e..77e66ab8764f 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -175,7 +175,7 @@ allOf:
properties:
reg:
minItems: 5
- maxItems: 5
+ maxItems: 6
reg-names:
items:
- const: dbi # DesignWare PCIe registers
@@ -183,6 +183,7 @@ allOf:
- const: atu # ATU address space
- const: parf # Qualcomm specific registers
- const: config # PCIe configuration space
+ - const: mhi # MHI registers
- if:
properties:
--
2.34.1
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