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Message-ID: <3pgh622n6mnh63ih2olzmmcmqgxewpaumrqh6eeq3w6uobuiwy@cm7jxdkmle5u>
Date: Fri, 14 Mar 2025 06:39:56 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Stephen Boyd <sboyd@...nel.org>, Chen Wang <unicorn_wang@...look.com>, 
	Conor Dooley <conor+dt@...nel.org>, Inochi Amaoto <inochiama@...il.com>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Michael Turquette <mturquette@...libre.com>, 
	Richard Cochran <richardcochran@...il.com>, Rob Herring <robh@...nel.org>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	sophgo@...ts.linux.dev, linux-kernel@...r.kernel.org, netdev@...r.kernel.org, 
	Yixun Lan <dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v3 2/2] clk: sophgo: Add clock controller support for
 SG2044 SoC

On Thu, Mar 13, 2025 at 12:38:33PM -0700, Stephen Boyd wrote:
> Quoting Inochi Amaoto (2025-03-11 18:01:54)
> > On Tue, Mar 11, 2025 at 12:23:35PM -0700, Stephen Boyd wrote:
> > > Quoting Inochi Amaoto (2025-02-26 15:23:19)
> > > > diff --git a/drivers/clk/sophgo/clk-sg2044.c b/drivers/clk/sophgo/clk-sg2044.c
> > > > new file mode 100644
> > > > index 000000000000..b4c15746de77
> > > > --- /dev/null
> > > > @@ -0,0 +1,2271 @@
> > > > +// SPDX-License-Identifier: GPL-2.0
> > > > +/*
> > > > + * Sophgo SG2042 clock controller Driver
> [...]
> > > > +};
> > > > +
> > > > +static struct sg2044_clk_common *sg2044_gate_commons[] = {
> > > 
> > > Can these arrays be const?
> > > 
> > 
> > It can not be, we need a non const clk_hw to register. It is 
> > defined in this structure. Although these array can be set as
> > "struct sg2044_clk_common * const", but I think this is kind
> > of meaningless.
> 
> Can't the array of pointers can be const so that it lives in RO memory?

Yeah, it can. I forgot this can also be set as RO. It is OK for me
to fix that.

Regards,
Inochi

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