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Message-ID: <f6165df5-eedb-4a11-add0-2ae4d4052d6a@lunn.ch>
Date: Thu, 13 Mar 2025 23:07:55 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Chris Packham <Chris.Packham@...iedtelesis.co.nz>
Cc: "hkallweit1@...il.com" <hkallweit1@...il.com>,
	"linux@...linux.org.uk" <linux@...linux.org.uk>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"edumazet@...gle.com" <edumazet@...gle.com>,
	"kuba@...nel.org" <kuba@...nel.org>,
	"pabeni@...hat.com" <pabeni@...hat.com>,
	"daniel@...rotopia.org" <daniel@...rotopia.org>,
	"markus.stockhausen@....de" <markus.stockhausen@....de>,
	"sander@...nheule.net" <sander@...nheule.net>,
	netdev <netdev@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v10] net: mdio: Add RTL9300 MDIO driver

> I'm pretty sure it would upset the hardware polling mechanism which 
> unfortunately we can't disable (earlier I thought we could but there are 
> various switch features that rely on it).

So we need to get a better understanding of that polling. How are you
telling it about the aquantia PHY features? How does it know it needs
to get the current link rate from MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1
which is a vendor register, not a standard C45 register? How do you
teach it to decode bits in that register?

	Andrew

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