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Message-ID: <6843e66c-d85c-4af0-8b49-773803825381@kernel.org>
Date: Fri, 14 Mar 2025 10:20:41 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: George Moussalem <george.moussalem@...look.com>
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-phy@...ts.infradead.org,
andersson@...nel.org, bhelgaas@...gle.com, conor+dt@...nel.org,
devicetree@...r.kernel.org, lumag@...nel.org, kishon@...nel.org,
konradybcio@...nel.org, krzk+dt@...nel.org, kw@...ux.com,
lpieralisi@...nel.org, manivannan.sadhasivam@...aro.org,
p.zabel@...gutronix.de, quic_nsekar@...cinc.com, robh@...nel.org,
robimarko@...il.com, vkoul@...nel.org, quic_srichara@...cinc.com
Subject: Re: [PATCH v4 3/6] dt-bindings: PCI: qcom: Add IPQ5018 SoC
On 14/03/2025 09:42, George Moussalem wrote:
>>> + reg-names:
>>> + items:
>>> + - const: parf # Qualcomm specific registers
>>> + - const: dbi # DesignWare PCIe registers
>>> + - const: elbi # External local bus interface registers
>>> + - const: atu # ATU address space
>>> + - const: config # PCIe configuration space
>>
>> Keep the same order as other IPQ, so dbi+elbi+atu+parf+config. Same for
>> everything else, so standard rule applies: devices are supposed to use
>> ordering from existing variants.
>>
>> There is some huge mess with IPQ PCI bindings, including things on the
>> list. Apparently it became my job to oversee Qualcomm PCI work... well,
>> I do not have time for that, so rather I expect contributors to
>> cooperate in this matter.
>>
>> Don't throw your patches over the wall.
>>
>> If you need to rework the patch, take the ownership and rework it.
>>
>>
>
> Thanks Krzysztof. I did reorder them deliberately based on unit
> addresses as discussed also in other threads about IPQ9574 and IPQ5332
> as I thought it would be neater that way. I'll change it back, reuse
Which discusses were that? What were the reasons to start with parf?
> other sections in the dt as much as possible, and follow your guidance
> instead.
Best regards,
Krzysztof
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