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Message-ID: <20250317184930.GQ9311@nvidia.com>
Date: Mon, 17 Mar 2025 15:49:30 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: kevin.tian@...el.com, corbet@....net, joro@...tes.org,
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Subject: Re: [PATCH v9 00/14] iommufd: Add vIOMMU infrastructure (Part-3:
vEVENTQ)
On Tue, Mar 11, 2025 at 12:44:18PM -0700, Nicolin Chen wrote:
> As the vIOMMU infrastructure series part-3, this introduces a new vEVENTQ
> object. The existing FAULT object provides a nice notification pathway to
> the user space with a queue already, so let vEVENTQ reuse that.
>
> Mimicing the HWPT structure, add a common EVENTQ structure to support its
> derivatives: IOMMUFD_OBJ_FAULT (existing) and IOMMUFD_OBJ_VEVENTQ (new).
>
> An IOMMUFD_CMD_VEVENTQ_ALLOC is introduced to allocate vEVENTQ object for
> vIOMMUs. One vIOMMU can have multiple vEVENTQs in different types but can
> not support multiple vEVENTQs in the same type.
>
> The forwarding part is fairly simple but might need to replace a physical
> device ID with a virtual device ID in a driver-level event data structure.
> So, this also adds some helpers for drivers to use.
>
> As usual, this series comes with the selftest coverage for this new ioctl
> and with a real world use case in the ARM SMMUv3 driver.
> Nicolin Chen (14):
> iommufd/fault: Move two fault functions out of the header
> iommufd/fault: Add an iommufd_fault_init() helper
> iommufd: Abstract an iommufd_eventq from iommufd_fault
> iommufd: Rename fault.c to eventq.c
> iommufd: Add IOMMUFD_OBJ_VEVENTQ and IOMMUFD_CMD_VEVENTQ_ALLOC
> iommufd/viommu: Add iommufd_viommu_get_vdev_id helper
> iommufd/viommu: Add iommufd_viommu_report_event helper
> iommufd/selftest: Require vdev_id when attaching to a nested domain
> iommufd/selftest: Add IOMMU_TEST_OP_TRIGGER_VEVENT for vEVENTQ
> coverage
> iommufd/selftest: Add IOMMU_VEVENTQ_ALLOC test coverage
> Documentation: userspace-api: iommufd: Update FAULT and VEVENTQ
> iommu/arm-smmu-v3: Introduce struct arm_smmu_vmaster
> iommu/arm-smmu-v3: Report events that belong to devices attached to
> vIOMMU
> iommu/arm-smmu-v3: Set MEV bit in nested STE for DoS mitigations
Applied, thanks
Jason
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