linux-kernel - Re: [PATCH v3 1/1] KVM: arm64: Allow cacheable stage 2 mapping using VMA flags

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Date: Mon, 17 Mar 2025 05:55:55 +0000
From: Ankit Agrawal <ankita@...dia.com>
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Subject: Re: [PATCH v3 1/1] KVM: arm64: Allow cacheable stage 2 mapping using
 VMA flags

>> For my education, what is an accepted way to communicate this? Please let
>> me know if there are any relevant examples that you may be aware of.
>
> A KVM capability is what is usually needed.

I see. If IIUC, this would involve a corresponding Qemu (usermode) change
to fetch the new KVM cap. Then it could fail in case the FWB is not
supported with some additional conditions (so that the currently supported
configs with !FWB won't break on usermode). 

The proposed code change is to map in S2 as NORMAL when vma flags
has VM_PFNMAP. However, Qemu cannot know that driver is mapping
with PFNMAP or not. So how may Qemu decide whether it is okay to
fail for !FWB or not?

> This must be checked at the point of memslot creation, and return an
> error at that point. Memslots are all about stage-2, so it makes sense
> to check it there.

Ack, will add the check.

>
>        M.
>
> --
> Without deviation from the norm, progress is not possible.