linux-kernel - Re: [PATCH v4 2/3] ARM: dts: aspeed-g6: Add AST2600 LPC PCC support

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Message-ID: <20250317-chital-of-unusual-force-a4b7b7@krzk-bin>
Date: Mon, 17 Mar 2025 10:13:04 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Kevin Chen <kevin_chen@...eedtech.com>
Cc: lee@...nel.org, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, joel@....id.au, andrew@...econstruct.com.au, 
	derek.kiernan@....com, dragan.cvetic@....com, arnd@...db.de, gregkh@...uxfoundation.org, 
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/3] ARM: dts: aspeed-g6: Add AST2600 LPC PCC support

On Fri, Mar 14, 2025 at 07:21:12PM +0800, Kevin Chen wrote:
> The AST2600 has PCC controller in LPC, placed in LPC node.
> 
> Signed-off-by: Kevin Chen <kevin_chen@...eedtech.com>
> ---
>  arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> index 8ed715bd53aa..f238337e02da 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> @@ -626,6 +626,14 @@ lpc_snoop: lpc-snoop@80 {
>  					status = "disabled";
>  				};
>  
> +				lpc_pcc: lpc-pcc@0 {
> +					compatible = "aspeed,ast2600-lpc-pcc";
> +					reg = <0x0 0x140>;
> +					interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> +					pcc-ports = <0x80>;

So this is 0x80 for entire SoC, then it is implied by compatible, no?

> +					status = "disabled";

Where is any DTS user of this device?

Best regards,
Krzysztof