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Message-ID: <20250318064939.3638381-1-quic_mmanikan@quicinc.com>
Date: Tue, 18 Mar 2025 12:19:39 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <andersson@...nel.org>, <konradybcio@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<quic_srichara@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <quic_varada@...cinc.com>
Subject: [PATCH v2] arm64: dts: qcom: ipq5424: fix and relocate uart1 gpio configurations
Update the bias configuration for UART1 TX and RX pins to ensure correct
settings for RDP466.
Additionally, move the UART1 GPIO configurations from the common .dtsi
file to the RDP-specific .dts files to account for differing bias
configurations across RDPs of IPQ5424.
Fixes: 1a91d2a6021e ("arm64: dts: qcom: add IPQ5424 SoC and rdp466 board support")
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
---
Changes in V2:
- Consolidated uart1_tx_state and uart1_rx_state nodes into a
single qup_uart1_default_state node, which includes the
configuration for both UART1 TX and RX pins.
- Inserted a blank line before the status property in the UART1
node.
- Fixed review comments from Kathiravan Thirumoorthy.
arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 19 ++++++++++++++++++-
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 7 -------
2 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index b9752e8d579e..f0cba6b2be70 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -102,6 +102,22 @@ &ssphy_0 {
};
&tlmm {
+ qup_uart1_default_state: qup-uart1-default-state {
+ uart1-tx-pins {
+ pins = "gpio44";
+ function = "uart1";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ uart1-rx-pins {
+ pins = "gpio43";
+ function = "uart1";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
spi0_default_state: spi0-default-state {
clk-pins {
pins = "gpio6";
@@ -157,8 +173,9 @@ data-pins {
};
&uart1 {
- pinctrl-0 = <&uart1_pins>;
+ pinctrl-0 = <&qup_uart1_default_state>;
pinctrl-names = "default";
+
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index 402d0a2c7bcc..0117f6422347 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -262,13 +262,6 @@ tlmm: pinctrl@...0000 {
gpio-ranges = <&tlmm 0 0 50>;
interrupt-controller;
#interrupt-cells = <2>;
-
- uart1_pins: uart1-state {
- pins = "gpio43", "gpio44";
- function = "uart1";
- drive-strength = <8>;
- bias-pull-up;
- };
};
gcc: clock-controller@...0000 {
base-commit: da920b7df701770e006928053672147075587fb2
--
2.34.1
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