linux-kernel - Re: [PATCH v4 5/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support

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Message-ID: <868qoymyuc.wl-maz@kernel.org>
Date: Fri, 21 Mar 2025 11:01:47 +0000
From: Marc Zyngier <maz@...nel.org>
To: Peter Chen <peter.chen@...tech.com>
Cc: robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	catalin.marinas@....com,
	will@...nel.org,
	arnd@...db.de,
	linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	cix-kernel-upstream@...tech.com,
	marcin@...zkiewicz.com.pl,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Fugang Duan <fugang.duan@...tech.com>
Subject: Re: [PATCH v4 5/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support

On Fri, 21 Mar 2025 10:31:55 +0000,
Peter Chen <peter.chen@...tech.com> wrote:
> 
> On 25-03-21 09:04:00, Marc Zyngier wrote:
> > > On 25-03-20 09:36:37, Marc Zyngier wrote:
> > > > Peter Chen <peter.chen@...tech.com> wrote:
> > > > >
> > > > > +     pmu-a520 {
> > > > > +             compatible = "arm,cortex-a520-pmu";
> > > > > +             interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_partition0>;
> > > > > +     };
> > > > > +
> > > > > +     pmu-a720 {
> > > > > +             compatible = "arm,cortex-a720-pmu";
> > > > > +             interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_partition1>;
> > > > > +     };
> > > > > +
> > > > > +     pmu-spe {
> > > > > +             compatible = "arm,statistical-profiling-extension-v1";
> > > > > +             interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_LOW 0>;
> > > > > +     };
> > > >
> > > > SPE should follow the same model as the PMU, as each CPU has its own
> > > > SPE implementation, exposing different micro-architectural details.
> > > >
> > >
> > > Hi Marc,
> > >
> > > Thanks for your reply. But there is only one compatible string
> > > "statistical-profiling-extension-v1" at drivers/perf/arm_spe_pmu.c,
> > > how could differentiate pmu-spe-a720 and pmu-spe-a520, do I need
> > > to change arm_spe_pmu.c as well?
> > 
> > I don't think there is a need to have different compatible. The driver
> > can probe which CPU this is on, and work out the implemented
> > subfeatures from the PMSIDR_EL1 register. New compatible strings are
> > better avoided when there is a way to probe/discover the HW (and in
> > most cases, there is).
> > 
> > Note that this equally applies to TRBE, which also explicitly deals
> > with interrupt partitioning and yet only has a single compatible.
> > Please consider adding TRBE support when you repost this series.
> > 
> 
> Hi Marc,
> 
> Thanks for your comment, we need to discuss it internally. Since it
> is very initial dts support for CIX sky1 SoC, I will delete pmu-spe
> support at this time, and add better support for it when adding
> more components next time.

And therefore making this machine even less useful than it already is?

<s> I think this is a great plan. </s>

	M.

-- 
Without deviation from the norm, progress is not possible.