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Message-ID: <174267455671.1906457.16602134107538739913.robh@kernel.org>
Date: Sat, 22 Mar 2025 15:16:13 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: George Moussalem <george.moussalem@...look.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Sricharan Ramabadhran <quic_srichara@...cinc.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-phy@...ts.infradead.org, linux-pci@...r.kernel.org,
Bjorn Andersson <andersson@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Nitheesh Sekar <quic_nsekar@...cinc.com>,
Varadarajan Narayanan <quic_varada@...cinc.com>,
Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Vinod Koul <vkoul@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
20250317100029.881286-2-quic_varada@...cinc.com,
linux-kernel@...r.kernel.org,
Kishon Vijay Abraham I <kishon@...nel.org>
Subject: Re: [PATCH v6 1/6] dt-bindings: phy: qcom: uniphy-pcie: Add ipq5018
compatible
On Fri, 21 Mar 2025 16:14:39 +0400, George Moussalem wrote:
> From: Nitheesh Sekar <quic_nsekar@...cinc.com>
>
> The IPQ5018 SoC contains a Gen2 1 and 2-lane PCIe UNIPHY which is the
> same as the one found in IPQ5332. As such, add IPQ5018 compatible.
>
> Signed-off-by: Nitheesh Sekar <quic_nsekar@...cinc.com>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
> Signed-off-by: George Moussalem <george.moussalem@...look.com>
> ---
> .../bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 49 ++++++++++++++++++----
> 1 file changed, 41 insertions(+), 8 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
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