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Message-ID: <20250324160838.GA1251294@bhelgaas>
Date: Mon, 24 Mar 2025 11:08:38 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Mike Looijmans <mike.looijmans@...ic.nl>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
	Krzysztof WilczyƄski <kw@...ux.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Michal Simek <michal.simek@....com>, Rob Herring <robh@...nel.org>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] pcie-xilinx: Support reset GPIO and wait for link-up
 status

On Mon, Mar 24, 2025 at 04:46:55PM +0100, Mike Looijmans wrote:
> On 24-03-2025 08:49, Manivannan Sadhasivam wrote:
> > On Fri, Mar 14, 2025 at 03:59:02PM +0100, Mike Looijmans wrote:
> > > Support providing the PERST reset signal through a devicetree binding.

Use "PERST#" to include the polarity and match the spec usage.

> > > As the PCIe spec mentions about 120 ms time to establish a link, we'll
> > > allow up to 200ms before giving up.
> > > 
> > This should be a separate change/patch.
> 
> Indeed, this is a separate issue, I'll split it in two parts.

And please include a specific spec reference, e.g., "PCIe r6.0, sec
x.y.z".

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