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Message-ID: <20250325110701.52623-1-angelogioacchino.delregno@collabora.com>
Date: Tue, 25 Mar 2025 12:06:57 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: chaotian.jing@...iatek.com
Cc: ulf.hansson@...aro.org,
matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com,
linux-mmc@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
kernel@...labora.com,
axe.yang@...iatek.com
Subject: [PATCH 0/4] mmc: mtk-sd: Cleanups for register R/W
This series adds missing register field definitions for the MSDC patch
bit registers and aggregates various register writes into just one,
greatly lowering the amount of register reads and writes especially
during the controller initialization phase, other than the tuning
phases and set_ios for mclk setting.
While this will have a performance gain, that is completely ignorable,
hence this series' only focus is a cleanup and an improvement in the
readability of the register settings (as those now have actual names,
some documenting, and no magic numbers around).
This series brings no functional differences.
AngeloGioacchino Del Regno (4):
mmc: mtk-sd: Clarify patch bit register initialization and layout
mmc: mtk-sd: Aggregate writes for MSDC_PATCH_BIT1/2 setup
mmc: mtk-sd: Do single write in function msdc_new_tx_setting
mmc: mtk-sd: Aggregate R/W for top_base iospace case where possible
drivers/mmc/host/mtk-sd.c | 207 ++++++++++++++++++++++++--------------
1 file changed, 132 insertions(+), 75 deletions(-)
--
2.48.1
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