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Message-ID: <20250326002404.25530-1-ansuelsmth@gmail.com>
Date: Wed, 26 Mar 2025 01:23:56 +0100
From: Christian Marangi <ansuelsmth@...il.com>
To: Christian Marangi <ansuelsmth@...il.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [net-next RFC PATCH v2 0/3] net: phy: Add support for new Aeonsemi PHYs
Add support for new Aeonsemi 10G C45 PHYs. These PHYs intergate an IPC
to setup some configuration and require special handling to sync with
the parity bit. The parity bit is a way the IPC use to follow correct
order of command sent.
Supported PHYs AS21011JB1, AS21011PB1, AS21010JB1, AS21010PB1,
AS21511JB1, AS21511PB1, AS21510JB1, AS21510PB1, AS21210JB1,
AS21210PB1 that all register with the PHY ID 0x7500 0x7500
before the firmware is loaded.
The big special thing about this PHY is that it does provide
a generic PHY ID in C45 register that change to the correct one
one the firmware is loaded.
In practice:
- MMD 0x7 ID 0x7500 0x9410 -> FW LOAD -> ID 0x7500 0x9422
To handle this, we apply a simple approach where the PHY
is registered a first time, with the PHY driver maching for
the generic PHY ID (0x7500 0x9410), probing and loading the fw.
The PHY driver enable the new option "needs_reregister" in phy_device.
This special option will detach the PHY driver from the PHY device,
scan the MDIO BUS for that address and attach it again. This is
done entirely in one go at the phy_register_device time.
At the second time the driver will match the more specific PHY ID
(0x7500 0x9422) as the PHY now provides it now that is had the FW
loaded.
We can assume the PHY doesn't change Vendor or Family after
the PHY is loaded (that wouldn't make sense) and in the extreme
case this happen, no PHY will be matched and the generic one is
loaded.
Changes v2:
- Move to RFC as net-next closed :(
- Add lock for IPC command
- Better check size values from IPC
- Add PHY ID for all supported PHYs
- Drop .get_feature (correct values are exported by standard
regs)
- Rework LED event to enum
- Update .yaml with changes requested (firmware-name required
for generic PHY ID)
- Better document C22 in C45
- Document PHY name logic
- Introduce patch to load PHY 2 times
Christian Marangi (3):
net: phy: permit PHYs to register a second time
net: phy: Add support for Aeonsemi AS21xxx PHYs
dt-bindings: net: Document support for Aeonsemi PHYs
.../bindings/net/aeonsemi,as21xxx.yaml | 122 +++
MAINTAINERS | 7 +
drivers/net/phy/Kconfig | 12 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/as21xxx.c | 973 ++++++++++++++++++
drivers/net/phy/phy_device.c | 27 +
include/linux/phy.h | 5 +
7 files changed, 1147 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml
create mode 100644 drivers/net/phy/as21xxx.c
--
2.48.1
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