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Message-ID: <1ed912df-42c7-4319-8765-3167963df7b3@fujitsu.com>
Date: Thu, 27 Mar 2025 07:44:23 +0000
From: "Zhijian Li (Fujitsu)" <lizhijian@...itsu.com>
To: Ira Weiny <ira.weiny@...el.com>, "linux-cxl@...r.kernel.org"
	<linux-cxl@...r.kernel.org>
CC: Jonathan Cameron <jonathan.cameron@...wei.com>, Dave Jiang
	<dave.jiang@...el.com>, Alison Schofield <alison.schofield@...el.com>, Vishal
 Verma <vishal.l.verma@...el.com>, Dan Williams <dan.j.williams@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] cxl/acpi: Verify CHBS length for CXL2.0



On 27/03/2025 11:44, Ira Weiny wrote:
> Li Zhijian wrote:
>> Per CXL Spec r3.1 Table 9-21, both CXL1.1 and CXL2.0 have defined their
>> own length, verify it to avoid an invalid CHBS
> 
> 
> I think this looks fine.  But did a platform have issues with this?  

Not really, actually, I discovered it while reviewing the code and
CXL specification.

Currently, this issue arises only when I inject an incorrect length
via QEMU environment. Our hardware does not experience this problem.


> Does this need to be backported?
I remain neutral :)

Thanks



> 
> Reviewed-by: Ira Weiny <ira.weiny@...el.com>
> 
> [snip]

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