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Message-ID: <d275cfe1-db7e-47d6-9ec6-b36f13524d65@kernel.org>
Date: Fri, 28 Mar 2025 10:17:59 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Hans Zhang <hans.zhang@...tech.com>,
 Manikandan Karunakaran Pillai <mpillai@...ence.com>
Cc: "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
 "lpieralisi@...nel.org" <lpieralisi@...nel.org>, "kw@...ux.com"
 <kw@...ux.com>,
 "manivannan.sadhasivam@...aro.org" <manivannan.sadhasivam@...aro.org>,
 "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
 <krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
 "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
 "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/7] dt-bindings: pci: cadence: Extend compatible for new
 platform configurations

On 28/03/2025 09:48, Hans Zhang wrote:
> 
> 
> On 2025/3/28 16:22, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL
>>
>> On Thu, Mar 27, 2025 at 11:19:47AM +0000, Manikandan Karunakaran Pillai wrote:
>>> Document the compatible property for the newly added values for PCIe EP and
>>> RP configurations. Fix the compilation issues that came up for the existing
>>> Cadence bindings
>>>
>>> Signed-off-by: Manikandan K Pillai <mpillai@...ence.com>
>>> ---
>>>   .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  12 +-
>>>   .../bindings/pci/cdns,cdns-pcie-host.yaml     | 119 +++++++++++++++---
>>>   2 files changed, 110 insertions(+), 21 deletions(-)
>>
>> One more thing: SoB mismatch. Maybe got corrupted by Microsoft (it is
>> known), so you really need to fix your mailing setup or use b4 relay.
>>
> 
> Hi Krzysztof,
> 
> I have obtained Manikandan's consent and we will collaborate to submit 

It does not matter. You still need proper SoB / DCO chain. Please follow
submitting patches.

Best regards,
Krzysztof

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