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Message-ID: <174349973787.1865724.9911990020381072512.b4-ty@bootlin.com>
Date: Tue, 1 Apr 2025 11:29:18 +0200
From: Alexandre Belloni <alexandre.belloni@...tlin.com>
To: linux-rtc@...r.kernel.org,
"A. Sverdlin" <alexander.sverdlin@...mens.com>
Cc: Lukas Stockmann <lukas.stockmann@...mens.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] rtc: pcf85063: do a SW reset if POR failed
On Mon, 20 Jan 2025 10:34:49 +0100, A. Sverdlin wrote:
> Power-on Reset has a documented issue in PCF85063, refer to its datasheet,
> section "Software reset":
>
> "There is a low probability that some devices will have corruption of the
> registers after the automatic power-on reset if the device is powered up
> with a residual VDD level. It is required that the VDD starts at zero volts
> at power up or upon power cycling to ensure that there is no corruption of
> the registers. If this is not possible, a reset must be initiated after
> power-up (i.e. when power is stable) with the software reset command"
>
> [...]
Applied, thanks!
[1/1] rtc: pcf85063: do a SW reset if POR failed
https://git.kernel.org/abelloni/c/2b7cbd98495f
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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