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Message-ID: <e340a408-2e21-1bca-7267-46b84690f66f@rock-chips.com>
Date: Wed, 2 Apr 2025 16:06:55 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Jensen Huang <jensenhuang@...endlyarm.com>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kw@...ux.com>,
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
 Heiko Stuebner <heiko@...ech.de>, Philipp Zabel <p.zabel@...gutronix.de>,
 Anand Moon <linux.amoon@...il.com>
Cc: shawn.lin@...k-chips.com, Krzysztof Wilczyński
 <kwilczynski@...nel.org>, linux-pci@...r.kernel.org,
 linux-rockchip@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: rockchip: Fix order of rockchip_pci_core_rsts

在 2025/03/28 星期五 18:58, Jensen Huang 写道:
> The order of rockchip_pci_core_rsts follows the previous comments suggesting
> to avoid reordering. However, reset_control_bulk_deassert() applies resets in
> reverse, which may lead to the link downgrading to 2.5 GT/s.
> 
> This patch restores the deassert order and comments for core_rsts, introduced in
> commit 58c6990c5ee7 ("PCI: rockchip: Improve the deassert sequence of four reset pins").
> 
> Tested on NanoPC-T4 with Samsung 970 Pro.

Acked-by:  Shawn Lin <shawn.lin@...k-chips.com>

> 
> Fixes: 18715931a5c0 ("PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function")
> Signed-off-by: Jensen Huang <jensenhuang@...endlyarm.com>
> ---
>   drivers/pci/controller/pcie-rockchip.h | 10 +++++++---
>   1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
> index 11def598534b..4f63a03d535c 100644
> --- a/drivers/pci/controller/pcie-rockchip.h
> +++ b/drivers/pci/controller/pcie-rockchip.h
> @@ -320,11 +320,15 @@ static const char * const rockchip_pci_pm_rsts[] = {
>   	"aclk",
>   };
>   
> +/*
> + * Please don't reorder the deassert sequence of the following
> + * four reset pins.
> + */
>   static const char * const rockchip_pci_core_rsts[] = {
> -	"mgmt-sticky",
> -	"core",
> -	"mgmt",
>   	"pipe",
> +	"mgmt",
> +	"core",
> +	"mgmt-sticky",
>   };
>   
>   struct rockchip_pcie {

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