[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <174506353387.39503.4719676281195371261.b4-ty@linaro.org>
Date: Sat, 19 Apr 2025 17:22:22 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Shawn Lin <shawn.lin@...k-chips.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Heiko Stuebner <heiko@...ech.de>,
Philipp Zabel <p.zabel@...gutronix.de>,
Anand Moon <linux.amoon@...il.com>,
Jensen Huang <jensenhuang@...endlyarm.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
linux-pci@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: rockchip: Fix order of rockchip_pci_core_rsts
On Fri, 28 Mar 2025 18:58:22 +0800, Jensen Huang wrote:
> The order of rockchip_pci_core_rsts follows the previous comments suggesting
> to avoid reordering. However, reset_control_bulk_deassert() applies resets in
> reverse, which may lead to the link downgrading to 2.5 GT/s.
>
> This patch restores the deassert order and comments for core_rsts, introduced in
> commit 58c6990c5ee7 ("PCI: rockchip: Improve the deassert sequence of four reset pins").
>
> [...]
Applied, thanks!
[1/1] PCI: rockchip: Fix order of rockchip_pci_core_rsts
commit: 84d79f3304645d6e87b936d2bf8b8310798efec2
Best regards,
--
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Powered by blists - more mailing lists