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Message-ID: <2503deb2-b993-7fd1-adf3-cafa1e7bd2f4@oss.nxp.com>
Date: Thu, 3 Apr 2025 09:33:11 +0300
From: Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>
To: Daniel Lezcano <daniel.lezcano@...aro.org>, tglx@...utronix.de
Cc: linux-kernel@...r.kernel.org, thomas.fossati@...aro.org,
Larisa.Grigore@....com, ghennadi.procopciuc@....com,
krzysztof.kozlowski@...aro.org, S32@....com, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/STM32 ARCHITECTURE"
<linux-stm32@...md-mailman.stormreply.com>,
"moderated list:ARM/STM32 ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v4 1/2] dt-bindings: timer: Add NXP System Timer Module
On 4/2/2025 12:07 PM, Daniel Lezcano wrote:
[ ... ]
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + timer@...1c000 {
> + compatible = "nxp,s32g2-stm";
> + reg = <0x4011c000 0x3000>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks 0x3b>;
> + };
The S32G reference manual specifies two clocks for the STM module: one
for the registers and another for the counter itself. Shouldn't both
clocks be represented in the bindings?
--
Regards,
Ghennadi
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