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Message-ID: <befe7d30-1727-4540-9072-f21ef96ea504@kernel.org>
Date: Mon, 7 Apr 2025 08:04:57 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Faraz Ata <faraz.ata@...sung.com>, alim.akhtar@...sung.com,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
rosa.pila@...sung.com, dev.tailor@...sung.com, suyash.bitti@...sung.com
Subject: Re: [PATCH v2] arm64: dts: exynos: Add DT node for all UART ports
On 18/03/2025 08:56, Faraz Ata wrote:
> +
> + usi_17: usi@...800c0 {
Messed order. Keep nodes sorted by unit address (see DTS coding style).
> + compatible = "samsung,exynosautov920-usi",
> + "samsung,exynos850-usi";
> + reg = <0x10d800c0 0x20>;
> + samsung,sysreg = <&syscon_peric1 0x1040>;
> + samsung,mode = <USI_V2_UART>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
> + <&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>;
> + clock-names = "pclk", "ipclk";
> + status = "disabled";
> +
> + serial_17: serial@...80000 {
> + compatible = "samsung,exynosautov920-uart",
> + "samsung,exynos850-uart";
> + reg = <0x10d80000 0xc0>;
> + interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart17_bus>;
> + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
> + <&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>;
> + clock-names = "uart", "clk_uart_baud0";
> + samsung,uart-fifosize = <64>;
> + status = "disabled";
> + };
> + };
> +
> pwm: pwm@...b0000 {
> compatible = "samsung,exynosautov920-pwm",
> "samsung,exynos4210-pwm";
Best regards,
Krzysztof
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