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Message-ID: <CAPDyKFoKdj-Y4-dCwYRG7TLdS1HcSH=i9EN-b9Cpyo50kMmC5Q@mail.gmail.com>
Date: Tue, 8 Apr 2025 14:17:07 +0200
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Rob Herring <robh@...nel.org>
Cc: Stephan Gerhold <stephan.gerhold@...aro.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
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Subject: Re: [PATCH 18/19] dt-bindings: arm/cpus: Add power-domains constraints
+ Stephan Gerhold
On Mon, 7 Apr 2025 at 18:50, Rob Herring <robh@...nel.org> wrote:
>
> On Mon, Apr 7, 2025 at 11:23 AM Ulf Hansson <ulf.hansson@...aro.org> wrote:
> >
> > On Fri, 4 Apr 2025 at 15:09, Rob Herring <robh@...nel.org> wrote:
> > >
> > > On Fri, Apr 4, 2025 at 5:37 AM Ulf Hansson <ulf.hansson@...aro.org> wrote:
> > > >
> > > > On Fri, 4 Apr 2025 at 05:06, Rob Herring (Arm) <robh@...nel.org> wrote:
> > > > >
> > > > > The "power-domains" and "power-domains-names" properties are missing any
> > > > > constraints. Add the constraints and drop the generic descriptions.
> > > > >
> > > > > Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
> > > > > ---
> > > > > Documentation/devicetree/bindings/arm/cpus.yaml | 8 ++------
> > > > > 1 file changed, 2 insertions(+), 6 deletions(-)
> > > > >
> > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
> > > > > index 6f74ebfd38df..5bd5822db8af 100644
> > > > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml
> > > > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml
> > > > > @@ -313,19 +313,15 @@ properties:
> > > > > maxItems: 1
> > > > >
> > > > > power-domains:
> > > > > - description:
> > > > > - List of phandles and PM domain specifiers, as defined by bindings of the
> > > > > - PM domain provider (see also ../power_domain.txt).
> > > > > + maxItems: 1
> > > >
> > > > There are more than one in some cases. The most is probably three, I think.
> > >
> > > Unless I missed it, testing says otherwise. What would the names be if
> > > more than 1 entry?
> >
> > "psci", "perf", "cpr", etc
> >
> > The "psci" is always for CPU power management, the other is for CPU
> > performance scaling (which may be more than one power-domain in some
> > cases).
> >
> > I would suggest changing this to "maxItems: 3". That should be
> > sufficient I think.
>
> Again, my testing says 1 is enough. So where is a .dts file with 3 or 2?
Right! I assume those with 3 or 2 just haven't made it upstream yet,
but sure they are cases. If you prefer to update the binding later,
that's fine by me, but I just wanted to avoid unnecessary churns for
you.
For example, msm8916 seems to be one case that already uses "psci",
but requires an additional two power-domains for performance-scaling.
At least according to earlier discussions [1] with Stephan Gerhold.
Moreover, it's perfectly fine to also describe CPU's idle-states by
using the power-domains/domain-idle-states DT bindings, according to
the bindings for PSCI [2] (no matter of PSCI OSI/PC mode). In other
words, for all those that only have a "perf" or "cpr" power-domain
today (or whatever name is used for the performance-scaling domain),
those could easily add a "psci" power-domain too, depending on how
they choose to describe things in DT.
Kind regards
Uffe
[1]
https://lore.kernel.org/all/ZRcC2IRRv6dtKY65@gerhold.net/
[2]
Documentation/devicetree/bindings/arm/psci.yaml
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