linux-kernel - Re: [PATCH v1 0/2] x86/cacheinfo: Fixes for CPUID(0x80000005) and CPUID(0x80000006)

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Message-ID: <Z_bCohmnbteC_eCA@gmail.com>
Date: Wed, 9 Apr 2025 20:55:30 +0200
From: Ingo Molnar <mingo@...nel.org>
To: "Ahmed S. Darwish" <darwi@...utronix.de>
Cc: Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Cooper <andrew.cooper3@...rix.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	John Ogness <john.ogness@...utronix.de>, x86@...nel.org,
	x86-cpuid@...ts.linux.dev, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 0/2] x86/cacheinfo: Fixes for CPUID(0x80000005) and
 CPUID(0x80000006)


* Ahmed S. Darwish <darwi@...utronix.de> wrote:

> Hi,
> 
> On Wed, 09 Apr 2025, Ingo Molnar wrote:
> >
> > * Ahmed S. Darwish <darwi@...utronix.de> wrote:
> >
> > > While working on the x86-cpuid-db CPUID model on top of the CPUID(2) and
> > > CPUID(4) cleanups at tip/x86/cpu,[*] I've discovered some L1/2/3 cache
> > > associativity parsing issues for the AMD CPUID(4) emulation logic .
> > >
> > > Here are the fixes on top of -rc1.
> >
> > Could you please send these against tip:master?
> >
> > tip:x86/cpu already has your previous series, and I don't see the need
> > to create a version skew between v6.15 and the x86 tree for v6.16.
> >
> 
> Sure, I've just sent v2 over tip:master here:
> 
>    https://lore.kernel.org/lkml/20250409122233.1058601-1-darwi@linutronix.de

Applied, thanks!

	Ingo