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Message-ID: <c0af0d1a-1ad8-4aa1-8b98-f32626aa1e1a@linaro.org>
Date: Wed, 9 Apr 2025 09:48:19 +0200
From: neil.armstrong@...aro.org
To: Bjorn Andersson <andersson@...nel.org>
Cc: Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Dikshita Agarwal <quic_dikshita@...cinc.com>
Subject: Re: [PATCH] arm64: dts: qcom: sm8550: add iris DT node
On 09/04/2025 00:00, Bjorn Andersson wrote:
> On Mon, Apr 07, 2025 at 03:03:33PM +0200, neil.armstrong@...aro.org wrote:
>> From: Dikshita Agarwal <quic_dikshita@...cinc.com>
>>
>> Add DT entries for the sm8550 iris decoder.
>>
>> Signed-off-by: Dikshita Agarwal <quic_dikshita@...cinc.com>
>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 69 ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 69 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
>> index f78d5292c5dd5ec88c8deb0ca6e5078511ac52b7..ab49329a435d87107a4ff20cb7b9eeacbaf63247 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
>> @@ -3220,6 +3220,75 @@ opp-202000000 {
>> };
>> };
>>
>> + iris: video-codec@...0000 {
>> + compatible = "qcom,sm8550-iris";
>> +
>> + reg = <0 0x0aa00000 0 0xf0000>;
>> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
>> + <&videocc VIDEO_CC_MVS0_GDSC>,
>> + <&rpmhpd RPMHPD_MXC>,
>> + <&rpmhpd RPMHPD_MMCX>;
>> + power-domain-names = "venus", "vcodec0", "mxc", "mmcx";
>> + operating-points-v2 = <&iris_opp_table>;
>> +
>> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
>> + <&videocc VIDEO_CC_MVS0C_CLK>,
>> + <&videocc VIDEO_CC_MVS0_CLK>;
>> + clock-names = "iface", "core", "vcodec0_core";
>> +
>> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
>> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
>> + interconnect-names = "cpu-cfg", "video-mem";
>> +
>> + /* FW load region */
>> + memory-region = <&video_mem>;
>> +
>> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
>> + reset-names = "bus";
>> +
>> + iommus = <&apps_smmu 0x1940 0x0000>,
>> + <&apps_smmu 0x1947 0x0000>;
>> + dma-coherent;
>
> Given that this node depends on vendor-signed firmware and without
> firmware we're prevented from hitting sync_state, wouldn't it make sense
> to leave it status = "disabled" here, and only enable it in those cases
> where firmware is available and firmware-name specified?
Right I'll only enable it on the qcom dev platforms where the firmware is
already on linux-firmware.
Neil
>
>> +
>> + iris_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-240000000 {
>> + opp-hz = /bits/ 64 <240000000>;
>> + required-opps = <&rpmhpd_opp_svs>,
>> + <&rpmhpd_opp_low_svs>;
>> + };
>> +
>> + opp-338000000 {
>> + opp-hz = /bits/ 64 <338000000>;
>> + required-opps = <&rpmhpd_opp_svs>,
>> + <&rpmhpd_opp_svs>;
>> + };
>> +
>> + opp-366000000 {
>> + opp-hz = /bits/ 64 <366000000>;
>> + required-opps = <&rpmhpd_opp_svs_l1>,
>> + <&rpmhpd_opp_svs_l1>;
>> + };
>> +
>> + opp-444000000 {
>> + opp-hz = /bits/ 64 <444000000>;
>> + required-opps = <&rpmhpd_opp_turbo>,
>> + <&rpmhpd_opp_turbo>;
>> + };
>> +
>> + opp-533333334 {
>> + opp-hz = /bits/ 64 <533333334>;
>> + required-opps = <&rpmhpd_opp_turbo_l1>,
>> + <&rpmhpd_opp_turbo_l1>;
>> + };
>> + };
>> + };
>> +
>> videocc: clock-controller@...0000 {
>> compatible = "qcom,sm8550-videocc";
>> reg = <0 0x0aaf0000 0 0x10000>;
>>
>> ---
>> base-commit: 2bdde620f7f2bff2ff1cb7dc166859eaa0c78a7c
>> change-id: 20250407-topic-sm8x50-upstream-iris-8550-dt-2846b493e652
>>
>> Best regards,
>> --
>> Neil Armstrong <neil.armstrong@...aro.org>
>>
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