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Message-ID: <5cf9c47f-089a-4748-b4b5-21637fb7368c@oss.qualcomm.com>
Date: Thu, 10 Apr 2025 18:28:51 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Jie Gan <jie.gan@....qualcomm.com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach
<mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: Tingwei Zhang <quic_tingweiz@...cinc.com>,
Jinlong Mao <quic_jinlmao@...cinc.com>, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH v2 5/5] arm64: dts: qcom: sa8775p: Add interrupts to CTCU
device
On 4/10/25 3:33 AM, Jie Gan wrote:
> Add interrupts to enable byte-cntr function for TMC ETR devices.
>
> Signed-off-by: Jie Gan <jie.gan@....qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Konrad
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