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Message-ID: <d4a6b163-ae54-438a-9c05-e9bc1d1e8ca5@quicinc.com>
Date: Thu, 10 Apr 2025 14:56:13 +0800
From: Jie Gan <quic_jiegan@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Jie Gan <jie.gan@....qualcomm.com>
CC: Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach
	<mike.leach@...aro.org>,
        James Clark <james.clark@...aro.org>,
        "Alexander
 Shishkin" <alexander.shishkin@...ux.intel.com>,
        Maxime Coquelin
	<mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>,
        Tingwei Zhang
	<quic_tingweiz@...cinc.com>,
        Jinlong Mao <quic_jinlmao@...cinc.com>, <coresight@...ts.linaro.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH v2 2/5] dt-bindings: arm: Add an interrupt property for
 Coresight CTCU



On 4/10/2025 2:47 PM, Krzysztof Kozlowski wrote:
> On Thu, Apr 10, 2025 at 09:33:27AM GMT, Jie Gan wrote:
>> Add an interrupt property to CTCU device. The interrupt will be triggered
>> when the data size in the ETR buffer exceeds the threshlod of the
> 
> typo: threshold?

Will fix it in next version.

Thanks,
Jie

> 
>> BYTECNTRVAL register. Programming a threshold in the BYTECNTRVAL register
>> of CTCU device will enable the interrupt.
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> 
> Best regards,
> Krzysztof
> 
> 


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