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Message-ID: <7b70a71a.448.1961d1808e5.Coremail.andyshrk@163.com>
Date: Thu, 10 Apr 2025 08:27:16 +0800 (CST)
From: "Andy Yan" <andyshrk@....com>
To: "Nicolas Dufresne" <nicolas.dufresne@...labora.com>
Cc: "Benjamin Gaignard" <benjamin.gaignard@...labora.com>,
"Philipp Zabel" <p.zabel@...gutronix.de>,
"Mauro Carvalho Chehab" <mchehab@...nel.org>,
"Heiko Stuebner" <heiko@...ech.de>, linux-media@...r.kernel.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kernel@...labora.com
Subject: Re:[PATCH] media: verisilicono: Enable NV15 support for Rockchip
VDPU981
Hi Nicolas,
Typo in subject? s/verisilicono/verisilicon/
At 2025-04-10 03:30:09, "Nicolas Dufresne" <nicolas.dufresne@...labora.com> wrote:
>This is a "customer" format, though on Rockchip RK3588 it has been
>verified to be NV15 format, which matches what the GPU and display
>handles has 10bit pixel formats.
>
>Signed-off-by: Nicolas Dufresne <nicolas.dufresne@...labora.com>
>---
> drivers/media/platform/verisilicon/hantro_v4l2.c | 1 +
> .../platform/verisilicon/rockchip_vpu981_hw_av1_dec.c | 4 ++++
> drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 14 ++++++++++++++
> 3 files changed, 19 insertions(+)
>
>diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
>index 2bce940a58227c2bfef2bc3343992e4588ab36a4..7c3515cf7d64a090adfb8d8aff368f9a617f8c8a 100644
>--- a/drivers/media/platform/verisilicon/hantro_v4l2.c
>+++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
>@@ -77,6 +77,7 @@ int hantro_get_format_depth(u32 fourcc)
> switch (fourcc) {
> case V4L2_PIX_FMT_P010:
> case V4L2_PIX_FMT_P010_4L4:
>+ case V4L2_PIX_FMT_NV15:
> case V4L2_PIX_FMT_NV15_4L4:
> return 10;
> default:
>diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
>index 69b5d9e12926fb408c08f8ba2139d05ba44389b7..e4703bb6be7c175a89c0b8868cf2eafb84a872ed 100644
>--- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
>+++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
>@@ -2202,6 +2202,10 @@ static void rockchip_vpu981_postproc_enable(struct hantro_ctx *ctx)
> case V4L2_PIX_FMT_NV12:
> hantro_reg_write(vpu, &av1_pp_out_format, 3);
> break;
>+ case V4L2_PIX_FMT_NV15:
>+ /* this mapping is RK specific */
>+ hantro_reg_write(vpu, &av1_pp_out_format, 10);
>+ break;
> default:
> hantro_reg_write(vpu, &av1_pp_out_format, 0);
> }
>diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
>index 964122e7c355934cd80eb442219f6ba51bba8b71..f7c4a176167b40fe79ec5a6759dff8a77e849ae3 100644
>--- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
>+++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
>@@ -92,6 +92,20 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = {
> .step_height = MB_DIM,
> },
> },
>+ {
>+ .fourcc = V4L2_PIX_FMT_NV15,
>+ .codec_mode = HANTRO_MODE_NONE,
>+ .match_depth = true,
>+ .postprocessed = true,
>+ .frmsize = {
>+ .min_width = ROCKCHIP_VPU981_MIN_SIZE,
>+ .max_width = FMT_4K_WIDTH,
>+ .step_width = MB_DIM,
>+ .min_height = ROCKCHIP_VPU981_MIN_SIZE,
>+ .max_height = FMT_4K_HEIGHT,
>+ .step_height = MB_DIM,
>+ },
>+ },
> {
> .fourcc = V4L2_PIX_FMT_P010,
> .codec_mode = HANTRO_MODE_NONE,
>
>---
>base-commit: 9ddc3d6c16ea2587898a315f20f7b8fbd791dc1b
>change-id: 20250403-b4-hantro-nv15-support-07def4e7a537
>
>Best regards,
>--
>Nicolas Dufresne <nicolas.dufresne@...labora.com>
>
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