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Message-ID: <174440517329.3991355.13202379998472873935.robh@kernel.org>
Date: Fri, 11 Apr 2025 15:59:33 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Luo Jie <quic_luoj@...cinc.com>
Cc: devicetree@...r.kernel.org, Conor Dooley <conor+dt@...nel.org>,
quic_kkumarcs@...cinc.com, linux-clk@...r.kernel.org,
quic_suruchia@...cinc.com,
Michael Turquette <mturquette@...libre.com>,
linux-arm-msm@...r.kernel.org,
Bjorn Andersson <andersson@...nel.org>,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzk+dt@...nel.org>, quic_linchen@...cinc.com,
quic_leiwei@...cinc.com, Konrad Dybcio <konradybcio@...nel.org>,
quic_pavir@...cinc.com, Stephen Boyd <sboyd@...nel.org>
Subject: Re: [PATCH v2 1/4] dt-bindings: clock: qcom: Add CMN PLL support for
IPQ5424 SoC
On Fri, 11 Apr 2025 20:58:10 +0800, Luo Jie wrote:
> The CMN PLL block in the IPQ5424 SoC takes 48 MHZ as the reference
> input clock. The output clocks are the same as IPQ9574 SoC, except
> for the clock rate of output clocks to PPE and NSS.
>
> Also, add the new header file to export the CMN PLL output clock
> specifiers for IPQ5424 SoC.
>
> Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
> ---
> .../bindings/clock/qcom,ipq9574-cmn-pll.yaml | 1 +
> include/dt-bindings/clock/qcom,ipq5424-cmn-pll.h | 22 ++++++++++++++++++++++
> 2 files changed, 23 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh@...nel.org>
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