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Message-ID: <174461608376.31282.1274518591545382020.tip-bot2@tip-bot2>
Date: Mon, 14 Apr 2025 07:34:43 -0000
From: "tip-bot2 for Pi Xiange" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Pi Xiange <xiange.pi@...el.com>, Ingo Molnar <mingo@...nel.org>,
 Peter Zijlstra <peterz@...radead.org>, Tony Luck <tony.luck@...el.com>,
 Andrew Cooper <andrew.cooper3@...rix.com>, "H. Peter Anvin" <hpa@...or.com>,
 John Ogness <john.ogness@...utronix.de>,
 "Ahmed S. Darwish" <darwi@...utronix.de>, x86-cpuid@...ts.linux.dev,
 x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/cpu: Add CPU model number for Bartlett Lake
 CPUs with Raptor Cove cores

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     f3b9b7278259477d03dc643058fd9de9369290cb
Gitweb:        https://git.kernel.org/tip/f3b9b7278259477d03dc643058fd9de9369290cb
Author:        Pi Xiange <xiange.pi@...el.com>
AuthorDate:    Mon, 14 Apr 2025 11:28:39 +08:00
Committer:     Ingo Molnar <mingo@...nel.org>
CommitterDate: Mon, 14 Apr 2025 09:25:07 +02:00

x86/cpu: Add CPU model number for Bartlett Lake CPUs with Raptor Cove cores

Bartlett Lake has a P-core only product with Raptor Cove.

Signed-off-by: Pi Xiange <xiange.pi@...el.com>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Tony Luck <tony.luck@...el.com>
Cc: Andrew Cooper <andrew.cooper3@...rix.com>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: John Ogness <john.ogness@...utronix.de>
Cc: "Ahmed S. Darwish" <darwi@...utronix.de>
Cc: x86-cpuid@...ts.linux.dev
Link: https://lore.kernel.org/r/20250414032839.5368-1-xiange.pi@intel.com
---
 arch/x86/include/asm/intel-family.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 3a97a7e..405bde6 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -126,6 +126,8 @@
 #define INTEL_GRANITERAPIDS_X		IFM(6, 0xAD) /* Redwood Cove */
 #define INTEL_GRANITERAPIDS_D		IFM(6, 0xAE)
 
+#define INTEL_RAPTORCOVE		IFM(6, 0xD7) /* Bartlett Lake */
+
 /* "Hybrid" Processors (P-Core/E-Core) */
 
 #define INTEL_LAKEFIELD			IFM(6, 0x8A) /* Sunny Cove / Tremont */

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