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Message-ID: <174461608473.31282.14719684727200198339.tip-bot2@tip-bot2>
Date: Mon, 14 Apr 2025 07:34:44 -0000
From: "tip-bot2 for Ingo Molnar" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...nel.org>,
Andy Lutomirski <luto@...nel.org>, "Chang S. Bae" <chang.seok.bae@...el.com>,
Fenghua Yu <fenghua.yu@...el.com>, "H. Peter Anvin" <hpa@...or.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Oleg Nesterov <oleg@...hat.com>, x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: x86/merge] x86/fpu: Clarify FPU context cacheline alignment
The following commit has been merged into the x86/merge branch of tip:
Commit-ID: e3a52b67f54aa36ab21265eeea016460b5fe1c46
Gitweb: https://git.kernel.org/tip/e3a52b67f54aa36ab21265eeea016460b5fe1c46
Author: Ingo Molnar <mingo@...nel.org>
AuthorDate: Thu, 10 Apr 2025 12:52:16 +02:00
Committer: Ingo Molnar <mingo@...nel.org>
CommitterDate: Mon, 14 Apr 2025 08:18:29 +02:00
x86/fpu: Clarify FPU context cacheline alignment
Suggested-by: Peter Zijlstra <peterz@...radead.org>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Cc: Andy Lutomirski <luto@...nel.org>
Cc: Chang S. Bae <chang.seok.bae@...el.com>
Cc: Fenghua Yu <fenghua.yu@...el.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Oleg Nesterov <oleg@...hat.com>
Link: https://lore.kernel.org/r/Z_ejggklB5-IWB5W@gmail.com
---
arch/x86/kernel/fpu/core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index d0a45f6..3a19877 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -607,7 +607,8 @@ int fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal,
* We allocate the new FPU structure right after the end of the task struct.
* task allocation size already took this into account.
*
- * This is safe because task_struct size is a multiple of cacheline size.
+ * This is safe because task_struct size is a multiple of cacheline size,
+ * thus x86_task_fpu() will always be cacheline aligned as well.
*/
struct fpu *dst_fpu = (void *)dst + sizeof(*dst);
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