linux-kernel - Re: [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically

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Message-ID: <Z/6p7eN+t6tsHCO6@lizhi-Precision-Tower-5810>
Date: Tue, 15 Apr 2025 14:48:13 -0400
From: Frank Li <Frank.li@....com>
To: Primoz Fiser <primoz.fiser@...ik.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
	imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, upstream@...ts.phytec.de
Subject: Re: [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin:
 Order node alphabetically

On Tue, Apr 15, 2025 at 06:33:11AM +0200, Primoz Fiser wrote:
> Move pinctrl_uart1 to keep nodes in alphabetical order. No functional
> changes.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@...ik.com>
> ---

Reviewed-by: Frank Li <Frank.Li@....com>

> Changes in v2:
> - new patch in v2 (fixing node order)
>
>  .../boot/dts/freescale/imx93-phyboard-segin.dts    | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index c62cc06fad4b..0c55b749c834 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -228,13 +228,6 @@ MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e
>  		>;
>  	};
>
> -	pinctrl_uart1: uart1grp {
> -		fsl,pins = <
> -			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e
> -			MX93_PAD_UART1_TXD__LPUART1_TX		0x30e
> -		>;
> -	};
> -
>  	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
>  		fsl,pins = <
>  			MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e
> @@ -257,6 +250,13 @@ MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00	0x1402
>  		>;
>  	};
>
> +	pinctrl_uart1: uart1grp {
> +		fsl,pins = <
> +			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e
> +			MX93_PAD_UART1_TXD__LPUART1_TX		0x30e
> +		>;
> +	};
> +
>  	pinctrl_usdhc2_cd: usdhc2cdgrp {
>  		fsl,pins = <
>  			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e
> --
> 2.34.1
>