linux-kernel - Re: [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata

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Message-ID: <46fa1d36-ec90-49b9-b352-1a3171f78d11@norik.com>
Date: Wed, 16 Apr 2025 14:38:16 +0200
From: Primoz Fiser <primoz.fiser@...ik.com>
To: Frank Li <Frank.li@....com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
 Sascha Hauer <s.hauer@...gutronix.de>,
 Pengutronix Kernel Team <kernel@...gutronix.de>,
 Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
 imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, upstream@...ts.phytec.de
Subject: Re: [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix
 for ERR052021 errata

Hi Frank,

On 15. 04. 25 20:42, Frank Li wrote:
> On Tue, Apr 15, 2025 at 06:33:05AM +0200, Primoz Fiser wrote:
> 
> subject should be
> 
> "set SION bit for CMD/DATA to fix ERR052021 errata"
> 

OK I can fix this in v3.

>> Implement fix for i.MX 93 silicon errata ERR052021:
>>
>> ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low
>> 		 drive mode and nominal mode
>> Description:
>> uSDHC PADs have one integration issue.
>> When CMD/DATA lines direction change from output to input, uSDHC
>> controller begin sampling, the integration issue will make input
>> enable signal from uSDHC propagated to the PAD with a long delay,
>> thus the new input value on the pad comes to uSDHC lately. The
>> uSDHC sampled the old input value and the sampling result is wrong.
>>
> 
> nit:
>   add 2 char indention

OK, will add.

BR,
Primoz

> 
>> Workaround:
>> Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will
>> propagate input to uSDHC with no delay, so correct value is sampled.
> 
> the same here
> 
>>
>> This issue will wrongly trigger the start bit when sample the USDHC
>> command response, cause the USDHC trigger command CRC/index/endbit
>> error, which will finally impact the tuning pass window, espically
>> will impact the standard tuning logic, and can't find a correct delay
>> cell to get the best timing.
>>
>> Based on commit bb89601282fc ("arm64: dts: imx93-11x11-evk: set SION for
>> cmd and data pad of USDHC").
>>
>> Signed-off-by: Primoz Fiser <primoz.fiser@...ik.com>
>> ---
>> Changes in v2:
>> - new patch in v2 (split from #8)
>>
>>  .../dts/freescale/imx93-phyboard-segin.dts    | 37 ++++++++++---------
>>  1 file changed, 20 insertions(+), 17 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> index 541297052b62..525f52789f8b 100644
>> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> @@ -75,39 +75,42 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e
>>  		>;
>>  	};
>>
>> +	/* need to config the SION for data and cmd pad, refer to ERR052021 */
>>  	pinctrl_usdhc2_default: usdhc2grp {
>>  		fsl,pins = <
>>  			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e
>> -			MX93_PAD_SD2_CMD__USDHC2_CMD		0x139e
>> -			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x138e
>> -			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x138e
>> -			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x138e
>> -			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x139e
>> +			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e
>> +			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e
>> +			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e
>> +			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000138e
>> +			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e
>>  			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
>>  		>;
>>  	};
>>
>> +	/* need to config the SION for data and cmd pad, refer to ERR052021 */
>>  	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
>>  		fsl,pins = <
>>  			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e
>> -			MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
>> -			MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x138e
>> -			MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x138e
>> -			MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x139e
>> -			MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e
>> -			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e
>> +			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e
>> +			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e
>> +			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e
>> +			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000139e
>> +			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e
>> +			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
>>  		>;
>>  	};
>>
>> +	/* need to config the SION for data and cmd pad, refer to ERR052021 */
>>  	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
>>  		fsl,pins = <
>>  			MX93_PAD_SD2_CLK__USDHC2_CLK		0x158e
>> -			MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
>> -			MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x139e
>> -			MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x139e
>> -			MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x139e
>> -			MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e
>> -			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e
>> +			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e
>> +			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000139e
>> +			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000139e
>> +			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000139e
>> +			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e
>> +			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
>>  		>;
>>  	};
>>  };
>> --
>> 2.34.1
>>

-- 
Primoz Fiser
phone: +386-41-390-545
email: primoz.fiser@...ik.com
--
Norik systems d.o.o.
Your embedded software partner
Slovenia, EU
phone: +386-41-540-545
email: info@...ik.com