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Message-ID: <9dc96af3-239f-4cb6-b095-875b862be493@kernel.org>
Date: Wed, 16 Apr 2025 08:52:57 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: "William A. Kennington III" <william@...nnington.com>,
 Avi Fishman <avifishman70@...il.com>, Tomer Maimon <tmaimon77@...il.com>,
 Tali Perry <tali.perry1@...il.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: openbmc@...ts.ozlabs.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: nuvoton: Add EDAC controller

On 16/04/2025 02:13, William A. Kennington III wrote:
> We have the driver support but need a common node for all the 8xx
> platforms that contain this device.
> 
> Signed-off-by: William A. Kennington III <william@...nnington.com>
> ---

You just sent it, so this is v2? If so, then use v2 in subject (see
other patches) and provide changelog under ---.

>  arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> index 4da62308b274..ccebcb11c05e 100644
> --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> @@ -56,6 +56,13 @@ clk: rstc: reset-controller@...01000 {
>  			#clock-cells = <1>;
>  		};
>  
> +		mc: memory-controller@...24000 {
> +			compatible = "nuvoton,npcm845-memory-controller";
> +			reg = <0x0 0xf0824000 0x0 0x2000>;
> +			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";

Why is this disabled? What resources are missing?


Best regards,
Krzysztof

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