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Message-ID:
 <TYCPR01MB1149254288CBFABBD03F027938ABF2@TYCPR01MB11492.jpnprd01.prod.outlook.com>
Date: Fri, 18 Apr 2025 09:29:46 +0000
From: Thierry Bultel <thierry.bultel.yh@...renesas.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
CC: "thierry.bultel@...atsea.fr" <thierry.bultel@...atsea.fr>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>, Paul
 Barker <paul.barker.ct@...renesas.com>, "linux-clk@...r.kernel.org"
	<linux-clk@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v7 02/13] dt-bindings: clock: Add cpg for the Renesas
 RZ/T2H SoC

Hi Geert,

> -----Original Message-----
[snip]
> 
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
> > @@ -0,0 +1,49 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > + *
> > + * Copyright (C) 2025 Renesas Electronics Corp.
> > + */
> > +
> > +#ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__
> > +#define __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__
> > +
> > +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> > +
> > +/* R9A09G077 CPG Core Clocks */
> > +#define R9A09G077_CA55C0               0
> > +#define R9A09G077_CA55C1               1
> > +#define R9A09G077_CA55C2               2
> > +#define R9A09G077_CA55C3               3
> > +#define R9A09G077_SDHIHS               4
> > +#define R9A09G077_CLK_PLL1_ETH_PHY     5
> > +#define R9A09G077_CLK_OSC_ETH_PHY      6
> > +#define R9A09G077_CLK_ETHPHY           7
> 
> I can't find these 3 clocks?

I am rewriting the definitions entirely to match the names on the documentation,
and define all the existing clocks (and not more).

Thanks for having deep checked this !

Thierry

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