linux-kernel - [PATCH] dt-bindings: arm/cpus: allow up to 3 interconnects entries

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-Id: <20250418-topic-sm8x50-upstream-cpu-icc-max3-v1-1-87d9c2713d72@linaro.org>
Date: Fri, 18 Apr 2025 14:56:16 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Sudeep Holla <sudeep.holla@....com>, Viresh Kumar <viresh.kumar@...aro.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-msm@...r.kernel.org, Neil Armstrong <neil.armstrong@...aro.org>
Subject: [PATCH] dt-bindings: arm/cpus: allow up to 3 interconnects entries

Allow up to 3 entries as used on the Qualcomm SM8650 CPU nodes.

This fixes the following errors:
cpu@0: interconnects: [[7, 3, 3, 7, 15, 3], [8, 0, 3, 8, 1, 3], [9, 0, 9, 1]] is too long

Fixes: 791a3fcd2345 ("dt-bindings: arm/cpus: Add missing properties")
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
---
 Documentation/devicetree/bindings/arm/cpus.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index 3d61313ca00ea4fc50f07f1e353be49ddc2377fa..f04ce5355806e6bd575aa1f7c0a69d0b3b605fbf 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -301,7 +301,7 @@ properties:
 
   interconnects:
     minItems: 1
-    maxItems: 2
+    maxItems: 3
 
   nvmem-cells:
     maxItems: 1

---
base-commit: bc8aa6cdadcc00862f2b5720e5de2e17f696a081
change-id: 20250418-topic-sm8x50-upstream-cpu-icc-max3-731ecf2a9402

Best regards,
-- 
Neil Armstrong <neil.armstrong@...aro.org>