linux-kernel - Re: [PATCH v2] arm64: dts: ti: k3-j784s4-main: Enable ACSPCIE outputs for PCIe interfaces

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Message-ID: <7da470c6-5426-48bf-838a-bc7a5b5dc5db@ti.com>
Date: Sat, 19 Apr 2025 18:38:00 +0530
From: "Kumar, Udit" <u-kumar1@...com>
To: Parth Pancholi <parth105105@...il.com>, Nishanth Menon <nm@...com>,
        Vignesh Raghavendra <vigneshr@...com>, Tero Kristo <kristo@...nel.org>,
        Rob
 Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor
 Dooley <conor+dt@...nel.org>,
        Siddharth Vadapalli <s-vadapalli@...com>
CC: Parth Pancholi <parth.pancholi@...adex.com>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <u-kumar1@...com>
Subject: Re: [PATCH v2] arm64: dts: ti: k3-j784s4-main: Enable ACSPCIE outputs
 for PCIe interfaces

Thanks for patch, Parth

On 4/4/2025 3:42 PM, Parth Pancholi wrote:
> From: Parth Pancholi <parth.pancholi@...adex.com>
>
> TI J784S4-based devices, such as the AM69 SoC, provide PCIE_REFCLK outputs
> from the SoC, which can be used to clock external PCIe endpoint devices.
> Each PCIE_REFCLK output is enabled via the corresponding ACSPCIE clock
> buffer, with each buffer supporting two PADs to provide reference clocks
> for two associated PCIe instances. The mappings are as follows:
>          - PCIe0 -> ACSPCIE1 PAD0
>          - PCIe1 -> ACSPCIE0 PAD0
>          - PCIe2 -> ACSPCIE1 PAD1
>          - PCIe3 -> ACSPCIE0 PAD1
>
> This patch enables each ACSPCIE module and its corresponding PADs to ensure
> that all PCIE_REFCLK outputs are functional.
>
> This change have been tested on an AM69-based custom hardware platform,
> where all four PCIe instances (PCIe0, PCIe1, PCIe2, and PCIe3) with the
> internal PCIE_REFCLK are utilized with various endpoint devices such as
> a WiFi card, NVMe SSD, and PCIe-to-USB bridge.

You can enabling REFCLK to be out as default.

There are few boards, on which this clock is either terminated at test 
point or not connected at all

Example AM69 board

PCIE_REFCLK2_P_OUT is not connected and PCIE_REFCLK0_P_OUT is terminated 
at test points.


IMO, this clock to be enabled where this can be connected to PCIe EP.

Let Siddharth also share his comment, where to enable these clocks board 
file or SOC file.

Regards

Udit

> Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1484211/am69-pcie-refclk-out-and-acspcie-mappings
> Signed-off-by: Parth Pancholi <parth.pancholi@...adex.com>
> ---
> This change depends on https://lore.kernel.org/all/20241209085157.1203168-1-s-vadapalli@ti.com/
> v2: set ti,syscon-acspcie-proxy-ctrl mask to 0x3 for all PCIe instances to prevent unintended overrides.
> v1: https://lore.kernel.org/all/20250320122259.525613-1-parth105105@gmail.com/
> ---
>   .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi    | 12 +++++++++---
>   arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi           | 10 ++++++----
>   2 files changed, 15 insertions(+), 7 deletions(-)
> [..]