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Message-ID: <0cd538c0-7d1f-44a4-b89d-f285535c0fcb@quicinc.com>
Date: Sat, 19 Apr 2025 20:03:35 +0530
From: Akhil P Oommen <quic_akhilpo@...cinc.com>
To: Krzysztof Kozlowski <krzk+dt@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>,
<linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
Rob Clark
<robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Konrad Dybcio
<konradybcio@...nel.org>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
"Dmitry
Baryshkov" <dmitry.baryshkov@...aro.org>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, "Simona
Vetter" <simona@...ll.ch>,
Viresh Kumar <vireshk@...nel.org>, Nishanth Menon
<nm@...com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Maya Matuszczyk <maccraft123mc@...il.com>
Subject: Re: [PATCH v4 5/7] dt-bindings: opp: Add v2-qcom-adreno vendor
bindings
On 1/9/2025 2:10 AM, Akhil P Oommen wrote:
> Add a new schema which extends opp-v2 to support a new vendor specific
> property required for Adreno GPUs found in Qualcomm's SoCs. The new
> property called "qcom,opp-acd-level" carries a u32 value recommended
> for each opp needs to be shared to GMU during runtime.
>
> Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml.
>
> Cc: Rob Clark <robdclark@...il.com>
> Signed-off-by: Akhil P Oommen <quic_akhilpo@...cinc.com>
> ---
> .../bindings/opp/opp-v2-qcom-adreno.yaml | 97 ++++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 98 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
> new file mode 100644
> index 000000000000..de1f7c6c4f0e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Adreno compatible OPP supply
> +
> +description:
> + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific
> + ACD related information tailored for the specific chipset. This binding
> + provides the information needed to describe such a hardware value.
> +
> +maintainers:
> + - Rob Clark <robdclark@...il.com>
> +
> +allOf:
> + - $ref: opp-v2-base.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - const: operating-points-v2-adreno
> + - const: operating-points-v2
https://lore.kernel.org/all/173637143564.1057127.5997544431977689674.robh@kernel.org/
Krzysztof, sorry for the late response. I was checking further about the
above bot error. AFAIU, we should not include "const:
operating-points-v2" here, otherwise all opp tables compatible with
"operating-points-v2" get matched with opp-v2-qcom-adreno.yaml during
validation. So I am sending the v5 revision with the below fix:
+++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
@@ -19,9 +19,8 @@ allOf:
properties:
compatible:
- items:
- - const: operating-points-v2-adreno
- - const: operating-points-v2
+ contains:
+ const: operating-points-v2-adreno
-Akhil.
> +
> +patternProperties:
> + '^opp-[0-9]+$':
> + type: object
> + additionalProperties: false
> +
> + properties:
> + opp-hz: true
> +
> + opp-level: true
> +
> + opp-peak-kBps: true
> +
> + opp-supported-hw: true
> +
> + qcom,opp-acd-level:
> + description: |
> + A positive value representing the ACD (Adaptive Clock Distribution,
> + a fancy name for clk throttling during voltage droop) level associated
> + with this OPP node. This value is shared to a co-processor inside GPU
> + (called Graphics Management Unit a.k.a GMU) during wake up. It may not
> + be present for some OPPs and GMU will disable ACD while transitioning
> + to that OPP. This value encodes a voltage threshold, delay cycles &
> + calibration margins which are identified by characterization of the
> + SoC. So, it doesn't have any unit. This data is passed to GMU firmware
> + via 'HFI_H2F_MSG_ACD' packet.
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + required:
> + - opp-hz
> + - opp-level
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + gpu_opp_table: opp-table {
> + compatible = "operating-points-v2-adreno", "operating-points-v2";
> +
> + opp-687000000 {
> + opp-hz = /bits/ 64 <687000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> + opp-peak-kBps = <8171875>;
> + qcom,opp-acd-level = <0x882e5ffd>;
> + };
> +
> + opp-550000000 {
> + opp-hz = /bits/ 64 <550000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
> + opp-peak-kBps = <6074219>;
> + qcom,opp-acd-level = <0xc0285ffd>;
> + };
> +
> + opp-390000000 {
> + opp-hz = /bits/ 64 <390000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> + opp-peak-kBps = <3000000>;
> + qcom,opp-acd-level = <0xc0285ffd>;
> + };
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
> + opp-peak-kBps = <2136719>;
> + /* Intentionally left out qcom,opp-acd-level property here */
> + };
> +
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 910305c11e8a..f7119623e1f3 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7292,6 +7292,7 @@ S: Maintained
> B: https://gitlab.freedesktop.org/drm/msm/-/issues
> T: git https://gitlab.freedesktop.org/drm/msm.git
> F: Documentation/devicetree/bindings/display/msm/gpu.yaml
> +F: Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml
> F: drivers/gpu/drm/msm/adreno/
> F: drivers/gpu/drm/msm/msm_gpu.*
> F: drivers/gpu/drm/msm/msm_gpu_devfreq.*
>
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