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Message-ID: <86938add-1ccc-4be3-af3f-cff911c96d42@ti.com>
Date: Tue, 22 Apr 2025 09:23:26 -0500
From: Judith Mendez <jm@...com>
To: Nishanth Menon <nm@...com>
CC: Arnd Bergmann <arnd@...db.de>, Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Bjorn Andersson
	<bjorn.andersson@....qualcomm.com>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski@...aro.org>,
        Geert Uytterhoeven
	<geert+renesas@...der.be>,
        Dmitry Baryshkov <lumag@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        Vignesh Raghavendra <vigneshr@...com>
Subject: Re: [PATCH] arm64: defconfig: Enable hwspinlock and eQEP for K3

Hi Nishanth,

On 4/22/25 9:22 AM, Nishanth Menon wrote:
> On 09:15-20250422, Judith Mendez wrote:
>> Hi Arnd,
>>
>> On 4/22/25 1:37 AM, Arnd Bergmann wrote:
>>> On Mon, Apr 21, 2025, at 22:10, Judith Mendez wrote:
>>>> Enable CONFIG_HWSPINLOCK_OMAP to allow usage of these devices
>>>> across K3 SoC's. Also enable CONFIG_TI_EQEP which is enabled by
>>>> default on am64x SK board.
>>>>
>>>> Signed-off-by: Judith Mendez <jm@...com>
>>>
>>> Acked-by: Arnd Bergmann <arnd@...db.de>
>>>
>>> The patch seems fine to me, but you should address it at the
>>> TI K3 maintainers, so they know they should apply it and forward
>>> it to the SoC tree. You have Nishanth and Vignesh in Cc already,
>>> so I assume they will pick it up from here, just put them in
>>> 'To' instead next time and move Catalin and Will to 'Cc' or
>>> leave them off entirely.
>>>
>>
>> Will re-spin and fix the to and cc lists, thanks for reviewing!
> 
> There is no need to respin, it is already in my queue. Will pick it up
> as part of usual process. The above information that Arnd provided is
> for future reference.
> 
Sounds good, thanks for the help.

~ Judith

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