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Message-ID: <05f48eba-bbcb-814d-44b5-cb4d302828d2@quicinc.com>
Date: Thu, 24 Apr 2025 01:07:06 +0530
From: Vikash Garodia <quic_vgarodia@...cinc.com>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Dikshita Agarwal
<quic_dikshita@...cinc.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
"Mauro Carvalho Chehab" <mchehab@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>
CC: <linux-media@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 2/4] media: iris: add qcs8300 platform data
On 4/23/2025 9:16 PM, Bryan O'Donoghue wrote:
> On 23/04/2025 16:39, Vikash Garodia wrote:
>> Add platform data for QCS8300, which has different capabilities compared
>> to SM8550. Introduce a QCS8300 header that defines these capabilities
>> and fix the order of compat strings.
>>
>> Signed-off-by: Vikash Garodia <quic_vgarodia@...cinc.com>
>> ---
>> .../platform/qcom/iris/iris_platform_common.h | 1 +
>> .../media/platform/qcom/iris/iris_platform_gen2.c | 57 ++++++++++
>> .../platform/qcom/iris/iris_platform_qcs8300.h | 124 +++++++++++++++++++++
>> drivers/media/platform/qcom/iris/iris_probe.c | 16 ++-
>> 4 files changed, 192 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h
>> b/drivers/media/platform/qcom/iris/iris_platform_common.h
>> index
>> 6bc3a7975b04d612f6c89206eae95dac678695fc..3191a910653ce4bd71de9a0b4465fd583602adf6 100644
>> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h
>> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
>> @@ -36,6 +36,7 @@ enum pipe_type {
>> extern struct iris_platform_data sm8250_data;
>> extern struct iris_platform_data sm8550_data;
>> extern struct iris_platform_data sm8650_data;
>> +extern struct iris_platform_data qcs8300_data;
>> enum platform_clk_type {
>> IRIS_AXI_CLK,
>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c
>> b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
>> index
>> 5ff82296ee8ea5ad3954bd2254594048adcb8404..723e9f4cef42408168aca22b34ccd0a674a4fd25 100644
>> --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c
>> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
>> @@ -11,6 +11,7 @@
>> #include "iris_vpu_common.h"
>> #include "iris_platform_sm8650.h"
>> +#include "iris_platform_qcs8300.h"
>
> This is out of order, reviewing the header I don't believe there's any
> dependency in qcs8300.h on sm8650.h that justifies.
>
> qcs8300.h
> sm8650.h
No dependency, fixed in v4.
>
>
>> #define VIDEO_ARCH_LX 1
>> @@ -326,3 +327,59 @@ struct iris_platform_data sm8650_data = {
>> .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl,
>> .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl),
>> };
>> +
>> +/*
>> + * Shares most of SM8550 data except:
>> + * - inst_caps to platform_inst_cap_qcs8300
>> + * - inst_fw_caps to inst_fw_cap_qcs8300
>> + */
>> +struct iris_platform_data qcs8300_data = {
>> + .get_instance = iris_hfi_gen2_get_instance,
>> + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init,
>> + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
>> + .vpu_ops = &iris_vpu3_ops,
>> + .set_preset_registers = iris_set_sm8550_preset_registers,
>> + .icc_tbl = sm8550_icc_table,
>> + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
>> + .clk_rst_tbl = sm8550_clk_reset_table,
>> + .clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table),
>> + .bw_tbl_dec = sm8550_bw_table_dec,
>> + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec),
>> + .pmdomain_tbl = sm8550_pmdomain_table,
>> + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table),
>> + .opp_pd_tbl = sm8550_opp_pd_table,
>> + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table),
>> + .clk_tbl = sm8550_clk_table,
>> + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table),
>> + /* Upper bound of DMA address range */
>> + .dma_mask = 0xe0000000 - 1,
>> + .fwname = "qcom/vpu/vpu30_p4_s6.mbn",
>> + .pas_id = IRIS_PAS_ID,
>> + .inst_caps = &platform_inst_cap_qcs8300,
>> + .inst_fw_caps = inst_fw_cap_qcs8300,
>> + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_qcs8300),
>> + .tz_cp_config_data = &tz_cp_config_sm8550,
>> + .core_arch = VIDEO_ARCH_LX,
>> + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
>> + .ubwc_config = &ubwc_config_sm8550,
>> + .num_vpp_pipe = 2,
>> + .max_session_count = 16,
>> + .max_core_mbpf = ((4096 * 2176) / 256) * 4,
>> + .input_config_params =
>> + sm8550_vdec_input_config_params,
>> + .input_config_params_size =
>> + ARRAY_SIZE(sm8550_vdec_input_config_params),
>> + .output_config_params =
>> + sm8550_vdec_output_config_params,
>> + .output_config_params_size =
>> + ARRAY_SIZE(sm8550_vdec_output_config_params),
>> + .dec_input_prop = sm8550_vdec_subscribe_input_properties,
>> + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties),
>> + .dec_output_prop = sm8550_vdec_subscribe_output_properties,
>> + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties),
>> +
>> + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl,
>> + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl),
>> + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl,
>> + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl),
>> +};
>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h
>> b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h
>> new file mode 100644
>> index
>> 0000000000000000000000000000000000000000..f82355d72fcffe7e361bd30877cccb83fe9b549f
>> --- /dev/null
>> +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h
>> @@ -0,0 +1,124 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +static struct platform_inst_fw_cap inst_fw_cap_qcs8300[] = {
>> + {
>> + .cap_id = PROFILE,
>> + .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
>> + .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH,
>> + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
>> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) |
>> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
>> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
>> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH),
>> + .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
>> + .hfi_id = HFI_PROP_PROFILE,
>> + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
>> + .set = iris_set_u32_enum,
>> + },
>> + {
>> + .cap_id = LEVEL,
>> + .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
>> + .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_2,
>> + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) |
>> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2),
>> + .value = V4L2_MPEG_VIDEO_H264_LEVEL_6_1,
>> + .hfi_id = HFI_PROP_LEVEL,
>> + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
>> + .set = iris_set_u32_enum,
>> + },
>> + {
>> + .cap_id = INPUT_BUF_HOST_MAX_COUNT,
>> + .min = DEFAULT_MAX_HOST_BUF_COUNT,
>> + .max = DEFAULT_MAX_HOST_BURST_BUF_COUNT,
>> + .step_or_mask = 1,
>> + .value = DEFAULT_MAX_HOST_BUF_COUNT,
>> + .hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT,
>> + .flags = CAP_FLAG_INPUT_PORT,
>> + .set = iris_set_u32,
>> + },
>> + {
>> + .cap_id = STAGE,
>> + .min = STAGE_1,
>> + .max = STAGE_2,
>> + .step_or_mask = 1,
>> + .value = STAGE_2,
>> + .hfi_id = HFI_PROP_STAGE,
>> + .set = iris_set_stage,
>> + },
>> + {
>> + .cap_id = PIPE,
>> + .min = PIPE_1,
>> + .max = PIPE_2,
>> + .step_or_mask = 1,
>> + .value = PIPE_2,
>> + .hfi_id = HFI_PROP_PIPE,
>> + .set = iris_set_pipe,
>> + },
>> + {
>> + .cap_id = POC,
>> + .min = 0,
>> + .max = 2,
>> + .step_or_mask = 1,
>> + .value = 1,
>> + .hfi_id = HFI_PROP_PIC_ORDER_CNT_TYPE,
>> + },
>> + {
>> + .cap_id = CODED_FRAMES,
>> + .min = CODED_FRAMES_PROGRESSIVE,
>> + .max = CODED_FRAMES_PROGRESSIVE,
>> + .step_or_mask = 0,
>> + .value = CODED_FRAMES_PROGRESSIVE,
>> + .hfi_id = HFI_PROP_CODED_FRAMES,
>> + },
>> + {
>> + .cap_id = BIT_DEPTH,
>> + .min = BIT_DEPTH_8,
>> + .max = BIT_DEPTH_8,
>> + .step_or_mask = 1,
>> + .value = BIT_DEPTH_8,
>> + .hfi_id = HFI_PROP_LUMA_CHROMA_BIT_DEPTH,
>> + },
>> + {
>> + .cap_id = RAP_FRAME,
>> + .min = 0,
>> + .max = 1,
>> + .step_or_mask = 1,
>> + .value = 1,
>> + .hfi_id = HFI_PROP_DEC_START_FROM_RAP_FRAME,
>> + .flags = CAP_FLAG_INPUT_PORT,
>> + .set = iris_set_u32,
>> + },
>> +};
>> +
>> +static struct platform_inst_caps platform_inst_cap_qcs8300 = {
>> + .min_frame_width = 96,
>> + .max_frame_width = 4096,
>> + .min_frame_height = 96,
>> + .max_frame_height = 4096,
>> + .max_mbpf = (4096 * 2176) / 256,
>> + .mb_cycles_vpp = 200,
>> + .mb_cycles_fw = 326389,
>> + .mb_cycles_fw_vpp = 44156,
>> + .num_comv = 0,
>> +};
>> diff --git a/drivers/media/platform/qcom/iris/iris_probe.c
>> b/drivers/media/platform/qcom/iris/iris_probe.c
>> index
>> 7cd8650fbe9c09598670530103e3d5edf32953e7..6bc072c573e85b6d348e7d31509e8551ee0d1f16 100644
>> --- a/drivers/media/platform/qcom/iris/iris_probe.c
>> +++ b/drivers/media/platform/qcom/iris/iris_probe.c
>> @@ -335,16 +335,20 @@ static const struct dev_pm_ops iris_pm_ops = {
>> };
>> static const struct of_device_id iris_dt_match[] = {
>> +#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS))
>> + {
>> + .compatible = "qcom,sm8250-venus",
>> + .data = &sm8250_data,
>> + },
>> +#endif
>> + {
>> + .compatible = "qcom,qcs8300-iris",
>> + .data = &qcs8300_data,
>> + },
>
> same comment q should come before s in our ordered lists.
fixed in v4.
>
>> {
>> .compatible = "qcom,sm8550-iris",
>> .data = &sm8550_data,
>> },
>> -#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS))
>> - {
>> - .compatible = "qcom,sm8250-venus",
>> - .data = &sm8250_data,
>> - },
>> -#endif
>
> This part is right but should probably be a separate patch fixing the existing
> ordering.
Ok, added as a new patch to fix existing order in v4.
Regards,
Vikash
>
>> {
>> .compatible = "qcom,sm8650-iris",
>> .data = &sm8650_data,
>>
> ---bod
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