lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <3292610b-acb0-4b72-8aa8-9eec491238c5@kernel.org>
Date: Wed, 23 Apr 2025 07:11:07 +0200
From: Jiri Slaby <jirislaby@...nel.org>
To: Rengarajan S <rengarajan.s@...rochip.com>,
 kumaravel.thiagarajan@...rochip.com, tharunkumar.pasumarthi@...rochip.com,
 gregkh@...uxfoundation.org, linux-serial@...r.kernel.org,
 linux-kernel@...r.kernel.org, unglinuxdriver@...rochip.com
Subject: Re: [PATCH v1 tty-next] 8250: microchip: pci1xxxx: Add PCIe Hot reset
 disable support for Rev C0 and later devices

On 23. 04. 25, 5:38, Rengarajan S wrote:
> Systems that issue PCIe hot reset requests during a suspend/resume
> cycle cause PCI1XXXX device revisions prior to C0 to get its UART
> configuration registers reset to hardware default values. This results
> in device inaccessibility and data transfer failures. Starting with
> Revision C0, support was added in the device hardware (via the Hot
> Reset Disable Bit) to allow resetting only the PCIe interface and its
> associated logic, but preserving the UART configuration during a hot
> reset. This patch enables the hot reset disable feature during suspend/
> resume for C0 and later revisions of the device.
> 
> Signed-off-by: Rengarajan S <rengarajan.s@...rochip.com>
> ---
>   drivers/tty/serial/8250/8250_pci1xxxx.c | 18 ++++++++++++++++--
>   1 file changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c b/drivers/tty/serial/8250/8250_pci1xxxx.c
> index e9c51d4e447d..ec573327590f 100644
> --- a/drivers/tty/serial/8250/8250_pci1xxxx.c
> +++ b/drivers/tty/serial/8250/8250_pci1xxxx.c
> @@ -115,6 +115,7 @@
>   
>   #define UART_RESET_REG				0x94
>   #define UART_RESET_D3_RESET_DISABLE		BIT(16)
> +#define UART_RESET_HOT_RESET_DISABLE            BIT(17)
>   
>   #define UART_BURST_STATUS_REG			0x9C
>   #define UART_TX_BURST_FIFO			0xA0
> @@ -620,7 +621,13 @@ static int pci1xxxx_suspend(struct device *dev)
>   	}
>   
>   	data = readl(p + UART_RESET_REG);
> -	writel(data | UART_RESET_D3_RESET_DISABLE, p + UART_RESET_REG);
> +
> +	if (priv->dev_rev >= 0xC0)
> +		writel(data | (UART_RESET_D3_RESET_DISABLE |
> +		       UART_RESET_HOT_RESET_DISABLE), p + UART_RESET_REG);
> +	else
> +		writel(data | UART_RESET_D3_RESET_DISABLE,
> +		       p + UART_RESET_REG);

Instead of this overly long lines, could you just:
   data |= UART_RESET_HOT_RESET_DISABLE;
and keep the writel() as is?

thanks,
-- 
js
suse labs

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ