linux-kernel - Re: [PATCH v1 tty-next] 8250: microchip: pci1xxxx: Add PCIe Hot reset disable support for Rev C0 and later devices

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Message-ID: <52fb85019a97095c081609b4f106fe10023b441f.camel@microchip.com>
Date: Thu, 24 Apr 2025 03:57:29 +0000
From: <Rengarajan.S@...rochip.com>
To: <jirislaby@...nel.org>, <linux-serial@...r.kernel.org>,
	<gregkh@...uxfoundation.org>, <UNGLinuxDriver@...rochip.com>,
	<Kumaravel.Thiagarajan@...rochip.com>, <linux-kernel@...r.kernel.org>,
	<Tharunkumar.Pasumarthi@...rochip.com>
Subject: Re: [PATCH v1 tty-next] 8250: microchip: pci1xxxx: Add PCIe Hot reset
 disable support for Rev C0 and later devices

Hi Jiri Slaby,

Thanks for reviewing the patch.

On Wed, 2025-04-23 at 07:11 +0200, Jiri Slaby wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> On 23. 04. 25, 5:38, Rengarajan S wrote:
> > Systems that issue PCIe hot reset requests during a suspend/resume
> > cycle cause PCI1XXXX device revisions prior to C0 to get its UART
> > configuration registers reset to hardware default values. This
> > results
> > in device inaccessibility and data transfer failures. Starting with
> > Revision C0, support was added in the device hardware (via the Hot
> > Reset Disable Bit) to allow resetting only the PCIe interface and
> > its
> > associated logic, but preserving the UART configuration during a
> > hot
> > reset. This patch enables the hot reset disable feature during
> > suspend/
> > resume for C0 and later revisions of the device.
> > 
> > Signed-off-by: Rengarajan S <rengarajan.s@...rochip.com>
> > ---
> >   drivers/tty/serial/8250/8250_pci1xxxx.c | 18 ++++++++++++++++--
> >   1 file changed, 16 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c
> > b/drivers/tty/serial/8250/8250_pci1xxxx.c
> > index e9c51d4e447d..ec573327590f 100644
> > --- a/drivers/tty/serial/8250/8250_pci1xxxx.c
> > +++ b/drivers/tty/serial/8250/8250_pci1xxxx.c
> > @@ -115,6 +115,7 @@
> > 
> >   #define UART_RESET_REG                              0x94
> >   #define UART_RESET_D3_RESET_DISABLE         BIT(16)
> > +#define UART_RESET_HOT_RESET_DISABLE            BIT(17)
> > 
> >   #define UART_BURST_STATUS_REG                       0x9C
> >   #define UART_TX_BURST_FIFO                  0xA0
> > @@ -620,7 +621,13 @@ static int pci1xxxx_suspend(struct device
> > *dev)
> >       }
> > 
> >       data = readl(p + UART_RESET_REG);
> > -     writel(data | UART_RESET_D3_RESET_DISABLE, p +
> > UART_RESET_REG);
> > +
> > +     if (priv->dev_rev >= 0xC0)
> > +             writel(data | (UART_RESET_D3_RESET_DISABLE |
> > +                    UART_RESET_HOT_RESET_DISABLE), p +
> > UART_RESET_REG);
> > +     else
> > +             writel(data | UART_RESET_D3_RESET_DISABLE,
> > +                    p + UART_RESET_REG);
> 
> Instead of this overly long lines, could you just:
>    data |= UART_RESET_HOT_RESET_DISABLE;
> and keep the writel() as is?

Sure will update the code in the next revision.

> 
> thanks,
> --
> js
> suse labs