lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <3681181a-0fbb-4979-9a7e-b8fe5c1b7c3c@lunn.ch>
Date: Fri, 25 Apr 2025 04:01:30 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Andre Przywara <andre.przywara@....com>
Cc: Jernej Škrabec <jernej.skrabec@...il.com>,
	Yixun Lan <dlan@...too.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
	Samuel Holland <samuel@...lland.org>,
	Maxime Ripard <mripard@...nel.org>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
	netdev@...r.kernel.org, clabbe.montjoie@...il.com
Subject: Re: [PATCH 4/5] arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E
 board

> Ah, right, I dimly remembered there was some hardware setting, but your
> mentioning of those strap resistors now tickled my memory!
> 
> So according to the Radxa board schematic, RGMII0-RXD0/RXDLY is pulled
> up to VCCIO via 4.7K, while RGMII0-RXD1/TXDLY is pulled to GND (also via
> 4K7). According to the Motorcom YT8531 datasheet this means that RX
> delay is enabled, but TX delay is not.
> The Avaota board uses the same setup, albeit with an RTL8211F-CG PHY,
> but its datasheet confirms it uses the same logic.
> 
> So does this mean we should say rgmii-rxid, so that the MAC adds the TX
> delay? Does the stmmac driver actually support this? I couldn't find
> this part by quickly checking the code.

No. It is what the PCB provides which matters. A very small number of
PCB have extra long clock lines to add the 2ns delay. Those boards
should use 'rgmii'. All other boards should use rgmii-id, meaning the
delays need to be provided somewhere else. Typically it is the PHY
which adds the delays.

The strapping should not matter, the PHY driver will override that. So
'rgmii-id' should result in the PHY doing the basis 2ns in both
directions. The MAC DT properties then add additional delays, which i
consider fine tuning. Most systems don't actually need fine tuning,
but the YT8531 is funky, it often does need it for some reason.

	Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ