linux-kernel - Re: [PATCH v2 tty-next] 8250: microchip: pci1xxxx: Add PCIe Hot reset disable support for Rev C0 and later devices

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Message-ID: <f843a0060c1ca54c563f828a03f1dd56293715ea.camel@microchip.com>
Date: Fri, 25 Apr 2025 13:38:36 +0000
From: <Rengarajan.S@...rochip.com>
To: <jirislaby@...nel.org>, <linux-serial@...r.kernel.org>,
	<gregkh@...uxfoundation.org>, <UNGLinuxDriver@...rochip.com>,
	<Kumaravel.Thiagarajan@...rochip.com>, <linux-kernel@...r.kernel.org>,
	<Tharunkumar.Pasumarthi@...rochip.com>
Subject: Re: [PATCH v2 tty-next] 8250: microchip: pci1xxxx: Add PCIe Hot reset
 disable support for Rev C0 and later devices

Hi Jiri,

Thanks for reviewing the patch.

On Thu, 2025-04-24 at 10:44 +0200, Jiri Slaby wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> On 24. 04. 25, 5:59, Rengarajan S wrote:
> > Systems that issue PCIe hot reset requests during a suspend/resume
> > cycle cause PCI1XXXX device revisions prior to C0 to get its UART
> > configuration registers reset to hardware default values. This
> > results
> > in device inaccessibility and data transfer failures. Starting with
> > Revision C0, support was added in the device hardware (via the Hot
> > Reset Disable Bit) to allow resetting only the PCIe interface and
> > its
> > associated logic, but preserving the UART configuration during a
> > hot
> > reset. This patch enables the hot reset disable feature during
> > suspend/
> > resume for C0 and later revisions of the device.
> > 
> > v2
> > Retained the original writel and simplified the hot reset condition
> > v1
> > Initial Commit.
> 
> This should have been under the --- line below.

Sure will update in the next revision.

> 
> > Signed-off-by: Rengarajan S <rengarajan.s@...rochip.com>
> 
> Reviewed-by: Jiri Slaby <jirislaby@...nel.org>
> 
> > ---
> 
> vvvvv here
> 
> >   drivers/tty/serial/8250/8250_pci1xxxx.c | 10 ++++++++++
> >   1 file changed, 10 insertions(+)
> 
> thanks,
> --
> js
> suse labs