linux-kernel - RE: [PATCH v4 2/5] dt-bindings: pci: cadence: Extend compatible for new EP configurations

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Message-ID:
 <CH2PPF4D26F8E1C8414FE9CB9B9CC32F41EA2842@CH2PPF4D26F8E1C.namprd07.prod.outlook.com>
Date: Fri, 25 Apr 2025 02:17:41 +0000
From: Manikandan Karunakaran Pillai <mpillai@...ence.com>
To: Conor Dooley <conor@...nel.org>,
        "hans.zhang@...tech.com"
	<hans.zhang@...tech.com>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lpieralisi@...nel.org"
	<lpieralisi@...nel.org>,
        "kw@...ux.com" <kw@...ux.com>,
        "manivannan.sadhasivam@...aro.org" <manivannan.sadhasivam@...aro.org>,
        "robh@...nel.org" <robh@...nel.org>,
        "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "peter.chen@...tech.com" <peter.chen@...tech.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 2/5] dt-bindings: pci: cadence: Extend compatible for
 new EP configurations

>
>EXTERNAL MAIL
>
>
>On Thu, Apr 24, 2025 at 09:04:41AM +0800, hans.zhang@...tech.com wrote:
>> From: Manikandan K Pillai <mpillai@...ence.com>
>>
>> Document the compatible property for HPA (High Performance Architecture)
>> PCIe controller EP configuration.
>
>Please explain what makes the new architecture sufficiently different
>from the existing one such that a fallback compatible does not work.
>
>Same applies to the other binding patch.

The new architecture has a different HW architecture and it cannot be probed by the software.
The software needs to differentiate between the new and old architecture IP becos the register sets,
Register offsets and support for PCI generation and feature are different between these two architecture.
With the existing compatible it will not be possible to uniquely identify the generation and initialize the controller 

>
>Thanks,
>Conor.
>
>>
>> Signed-off-by: Manikandan K Pillai <mpillai@...ence.com>
>> Signed-off-by: Hans Zhang <hans.zhang@...tech.com>
>> ---
>>  .../devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml          | 6 ++++--
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
>b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
>> index 98651ab22103..a7e404e4f690 100644
>> --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
>> +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
>> @@ -7,14 +7,16 @@ $schema: http://devicetree.org/meta-
>schemas/core.yaml#
>>  title: Cadence PCIe EP Controller
>>
>>  maintainers:
>> -  - Tom Joseph <tjoseph@...ence.com>
>> +  - Manikandan K Pillai <mpillai@...ence.com>
>>
>>  allOf:
>>    - $ref: cdns-pcie-ep.yaml#
>>
>>  properties:
>>    compatible:
>> -    const: cdns,cdns-pcie-ep
>> +    enum:
>> +      - cdns,cdns-pcie-ep
>> +      - cdns,cdns-pcie-hpa-ep
>>
>>    reg:
>>      maxItems: 2
>> --
>> 2.47.1
>>