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Message-ID: <3ffe00fd-1fbe-41c6-b82d-030bcf6d76d8@quicinc.com>
Date: Fri, 25 Apr 2025 19:48:50 +0530
From: Praveen Talari <quic_ptalari@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Greg Kroah-Hartman
<gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>,
Viresh Kumar <vireshk@...nel.org>, Nishanth Menon
<nm@...com>,
Stephen Boyd <sboyd@...nel.org>,
"Rafael J. Wysocki"
<rafael@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-serial@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-pm@...r.kernel.org>
CC: <psodagud@...cinc.com>, <djaggi@...cinc.com>, <quic_msavaliy@...cinc.com>,
<quic_vtanuku@...cinc.com>, <quic_arandive@...cinc.com>,
<quic_mnaresh@...cinc.com>, <quic_shazhuss@...cinc.com>
Subject: Re: [PATCH v2 0/9] Enable QUPs and Serial on SA8255p Qualcomm
platforms
Hi
On 4/23/2025 6:31 PM, Konrad Dybcio wrote:
> On 4/18/25 5:12 PM, Praveen Talari wrote:
>> The Qualcomm automotive SA8255p SoC relies on firmware to configure
>> platform resources, including clocks, interconnects and TLMM. The device
>> drivers request resources operations over SCMI using power and
>> performance protocols.
>>
>> The SCMI power protocol enables or disables resources like clocks,
>> interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs,
>> such as resume/suspend, to control power states(on/off).
>>
>> The SCMI performance protocol manages UART baud rates, with each baud
>> rate represented by a performance level. Drivers use the
>> dev_pm_opp_set_level() API to request the desired baud rate by
>> specifying the performance level.
>>
>> The QUP drivers are SCMI clients, with clocks, interconnects, pinctrl
>> and power-domains abstracted by a SCMI server.
> So I recently started working on abstracting away power controls from
> the SE protocol drivers into a single place, among other improvements
>
> A snapshot of this work is available here
>
> https://github.com/quic-kdybcio/linux/commits/topic/single_node_genise/
>
> (not yet 100% ready..)
>
> I think it'd make sense to get it done first, so that we can condense
> most of your changes in the common driver, where we'd swap out the clock
> handling for perf level setting instead
Thank you for the update and for sharing the snapshot of your work. The
improvements you're working on sound promising, especially the
abstraction of power controls into a single place.
While we appreciate the direction you're taking, our patch has already
been pushed upstream with V2.
To maintain our momentum, we would prefer to continue with our current
cleanups rather than waiting for your post if it's planned for a few
weeks from now.
It would be greatly appreciated if you could take this patch and build
your ongoing work on top of it, as it would be somewhat similar to
optimize it from SE's protocol driver to the common geni driver for
power management.
That being said, could you please provide an estimated completion date
for your work?
Thanks,
Praveen
>
> Konrad
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