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Message-ID: <a5b6846a-5287-4a6d-a9a4-fd7e9c7c537b@quicinc.com>
Date: Fri, 25 Apr 2025 14:05:47 -0700
From: Jessica Zhang <quic_jesszhan@...cinc.com>
To: Dmitry Baryshkov <lumag@...nel.org>, Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie
<airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Konrad Dybcio
<konradybcio@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/5] drm/msm/dpu: rename non-SmartDMA feature masks to be
more explicit
On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>
> It is easy to skip or ignore the fact that the default SSPP feature
> masks for SDM845+ don't include the SmartDMA bit (both during
> development and during the review stage). Rename SSPP feature masks to
> make it more explicit that using non-SmartDMA masks should not be an
> exception rather than the rule.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@...cinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 10 +++++-----
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 6 +++---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 8 ++++----
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 8 ++++----
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 16 ++++++++--------
> 8 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
> index b2ebf76e386718b95292e119d53e67f5d9f0743a..99d8b1218db812ca7e99caf62aa48476aee5e02d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
> @@ -72,7 +72,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_2_4,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -80,7 +80,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_1", .id = SSPP_VIG1,
> .base = 0x6000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_2_4,
> .xin_id = 4,
> .type = SSPP_TYPE_VIG,
> @@ -88,7 +88,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_2", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -96,7 +96,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -104,7 +104,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f0,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
> index cc2951112bdadca60fe51faeecb81e57280662c3..ea1004e2295b215ef165fef862fa9c15c6ab3856 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
> @@ -69,7 +69,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_2_4,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -77,7 +77,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -85,7 +85,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
> index 42a00550eefbc10e97515340d6d8b33d4ef5e3fd..5e15a8dcbc2b701e47e352a8aaee72a25240817c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
> @@ -51,7 +51,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
> index 43f64a005f5a89e09ee9506a12cfff781530cb80..c5fd89dd7c89046bdbf1b1bf223aac2e3c4c0b26 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
> @@ -38,7 +38,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -46,7 +46,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> index 828a02429405238807562dd0aa29575f8367fdc7..fbbcaa5b98a23c0fcb570b7d33110860f1bf01a4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> @@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
> index 3cbb2fe8aba24c7b9db6bb61ff4c48f34db48bf4..53f3be28f6f61bb7e3f519b0efa4cb2f68d38810 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
> @@ -46,7 +46,7 @@ static const struct dpu_sspp_cfg qcm2290_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
> index a06c8634d2d7779f7e867fb821f8d332652ba7e9..3a3bc8e429be0ba86185741b6b27d8a62489779f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
> @@ -39,7 +39,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -47,7 +47,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index a6bb46b201e907566e88abce945507d1bab51b3b..d495dfa67192b99655ae432589d70fc5be8abbb6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -34,11 +34,11 @@
> #define VIG_MSM8998_MASK \
> (VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
>
> -#define VIG_SDM845_MASK \
> +#define VIG_SDM845_MASK_NO_SDMA \
> (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
>
> #define VIG_SDM845_MASK_SDMA \
> - (VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL))
>
> @@ -54,24 +54,24 @@
> BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
>
> #define VIG_SC7280_MASK \
> - (VIG_SDM845_MASK | BIT(DPU_SSPP_INLINE_ROTATION))
> + (VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_INLINE_ROTATION))
>
> #define VIG_SC7280_MASK_SDMA \
> (VIG_SC7280_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
>
> -#define DMA_SDM845_MASK \
> +#define DMA_SDM845_MASK_NO_SDMA \
> (BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
> BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
> BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
>
> -#define DMA_CURSOR_SDM845_MASK \
> - (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR))
> +#define DMA_CURSOR_SDM845_MASK_NO_SDMA \
> + (DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_CURSOR))
>
> #define DMA_SDM845_MASK_SDMA \
> - (DMA_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define DMA_CURSOR_SDM845_MASK_SDMA \
> - (DMA_CURSOR_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (DMA_CURSOR_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define DMA_CURSOR_MSM8996_MASK \
> (DMA_MSM8996_MASK | BIT(DPU_SSPP_CURSOR))
>
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